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TDA8798HL Datasheet(PDF) 9 Page - NXP Semiconductors |
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TDA8798HL Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 24 page 1999 Sep 16 9 Philips Semiconductors Objective specification Dual 8-bit, 100 Msps A/D converter with DPGA TDA8798 Table 2 Abbreviations Table 3 TE truth table Table 4 SR truth table Table 5 DPGAEN truth table Table 6 Gain Control SYMBOL DESCRIPTION GCR1 DPGA1 gain control register value GCR2 DPGA2 gain control register value SISR Serial interface shift register value X can be either logic state 0 or logic state 1 rising edge falling edge U can be either undefined logic state X rising edge or falling edge Di Data input TE ADC TRACK-AND-HOLD 0 track-and-hold enabled 1 track enabled SR ADC DIGITAL OUTPUT SLEW RATE 0 maximum 1 minimum DPGAEN DPGA FUNCTIONALITY 0 enabled 1 disabled GAIN CONTROL REGISTER VALUE GAIN (dBV) 000000 0.00 000001 0.54 000010 1.08 ... ... ... ... ... ... 111110 33.46 111111 34.00 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDDA analog supply voltage −0.3 +7.0 V VDDD digital supply voltage −0.3 +7.0 V VDDO output stage supply voltage −0.3 +7.0 V ∆V DDX supply voltage differences between VDDA and VDDD −1.0 +1.0 V VDDO and VDDD −1.0 +1.0 V VDDA and VDDO −1.0 +1.0 V Vi(VIN) input voltage range on VIN1 and VIN2 (pins 10 and 7) referenced to VSSA −0.3 +7.0 V IO output current − 10 mA Tstg storage temperature −55 +150 °C Tamb ambient temperature 0 70 °C Tj junction temperature − 104 °C |
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