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TDA9962HL Datasheet(PDF) 9 Page - NXP Semiconductors |
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TDA9962HL Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 24 page 2000 May 01 9 Philips Semiconductors Objective specification 12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras TDA9962 th(IN;SHP) CDS input hold time (pin IN) compared to control pulse SHP VCCA =VCCD = 3.0 V; Tamb =25 °C; see Figs 3 and 4 − 12 ns th(IN;SHD) CDS input hold time (pin IN) compared to control pulse SHD VCCA =VCCD = 3.0 V; Tamb =25 °C; see Figs 3 and 4 − 12 ns Amplifier DRPGA PGA dynamic range − 24 − dB ∆G PGA PGA gain step 0.08 0.10 0.12 dB Analog-to-Digital Converter (ADC) DNL differential non linearity fpix = 20 MHz; ramp input −±0.5 ±0.9 LSB Total chain characteristics (CDS + PGA + ADC) fpix(max) maximum pixel frequency 20 −− MHz fpix(min) minimum pixel frequency tbf −− MHz tCLKH CLK pulse width HIGH 15 −− ns tCLKL CLK pulse width LOW 15 −− ns td(SHD;CLK) time delay between SHD and CLK see Figs 3 and 4 10 −− ns tsu(BLK;SHD) set-up time of BLK compared to SHD see Figs 3 and 4 5 −− ns Vi(IN)(FS) video input dynamic signal for ADC full-scale output PGA code = 00 800 −− mV PGA code = 255 50 −− mV Ntot(rms) total noise from CDS input to ADC output (RMS value) see Fig.8 PGA gain = 0 dB − 1.2 − LSB PGA gain = 9 dB − 2.0 − LSB Ein(rms) equivalent input noise voltage (RMS value) PGA gain = 24 dB − 95 −µV PGA gain=9dB − 135 −µV OCCD(max) maximum offset between CCD floating level and CCD dark pixel level −100 − +100 mV Digital-to-analog converter (OFDOUT DAC) VOFDOUT(p-p) additional 8-bit control DAC (OFD) output voltage (peak-to-peak value) Ri =1MΩ− 1.0 − V VOFDOUT(0) DC output voltage for code 0 − AGND − V VOFDOUT(255) DC output voltage for code 255 − AGND + 1.0 − V TCDAC DAC output range temperature coefficient − 250 − ppm/ °C ZOFDOUT DAC output impedance − 2000 −Ω IOFDOUT OFD output current drive static −− 100 µA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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