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PE83512 Datasheet(PDF) 4 Page - Peregrine Semiconductor Corp. |
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PE83512 Datasheet(HTML) 4 Page - Peregrine Semiconductor Corp. |
4 / 7 page Product Specification PE83512 Page 4 of 7 ©2003-2006 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0117-03 │ UltraCMOS™ RFIC Solutions Evaluation Kit Figure 7. Evaluation Board Layouts Figure 8. Evaluation Board Schematic Peregrine Specification 102/0201 Peregrine Specification 101/0190 Applications Support If you have a problem with your evaluation kit or if you have applications questions call (858) 731-9400 and ask for applications support. You may also contact us by fax or e-mail: Fax: (858) 731-9499 E-Mail: help@psemi.com Evaluation Kit Operation The PE83512 EK board was designed to ease customer evaluation of Peregrine’s high performance Military Grade divide-by-4 Prescaler. On this board, the device input (pin 2) is connected via J1 and a 50 Ω transmission line. A series capacitor (C3) provides the necessary DC block for the device input. It is important to note that the value of this capacitance will impact the performance of the device. A value of 1000 pF was found to be optimal for this board layout; other applications may require a different value. The device output (pin 7) is connected to connector J3 through a 50 Ω transmission line. A series capacitor (C1) provides the necessary DC block for the device output. Note that this capacitor must be chosen to have low impedance at the desired output frequency the device. The value of 1000pF was chosen to provide a wide operating range for the evaluation board. The board is constructed of a two-layer FR4 material with a total thickness of 0.031”. The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide above ground plane model with trace width of 0.030”, trace gaps of 0.007”, dielectric thickness of 0.028”, metal thickness of 0.0014” and ε r of 4.4. Note that the predominate mode for these transmission lines is coplanar waveguide. J2 provides DC power to the device. Starting from the lower left pin, the second pin to the right (J2-3) is connected to the device VDD pin (1). Two decoupling capacitors (10pF, 1000pF) are included on this trace. It is the responsibility of the customer to determine proper supply decoupling for their design application. |
Similar Part No. - PE83512_06 |
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Similar Description - PE83512_06 |
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