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SN74AHCT573DWRG4 Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AHCT573DWRG4 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 20 page SN54AHCT573, SN74AHCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS243N – OCTOBER 1995 – REVISED JULY 2003 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Inputs Are TTL-Voltage Compatible D Latch-Up Performance Exceeds 250 mA Per JESD 17 D ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) description/ordering information The ’AHCT573 devices are octal transparent D-type latches. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is low, the Q outputs are latched at the logic levels of the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74AHCT573N SN74AHCT573N SOIC DW Tube SN74AHCT573DW AHCT573 SOIC – DW Tape and reel SN74AHCT573DWR AHCT573 40 °Cto85°C SOP – NS Tape and reel SN74AHCT573NSR AHCT573 –40 °C to 85°C SSOP – DB Tape and reel SN74AHCT573DBR HB573 TSSOP PW Tube SN74AHCT573PW HB573 TSSOP – PW Tape and reel SN74AHCT573PWR HB573 TVSOP – DGV Tape and reel SN74AHCT573DGVR HB573 CDIP – J Tube SNJ54AHCT573J SNJ54AHCT573J –55 °C to 125°C CFP – W Tube SNJ54AHCT573W SNJ54AHCT573W LCCC – FK Tube SNJ54AHCT573FK SNJ54AHCT573FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SN54AHCT573 ...J OR W PACKAGE SN74AHCT573 . . . DB, DGV, DW, N, NS, OR PW PACKAGE (TOP VIEW) SN54AHCT573 . . . FK PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1D 2D 3D 4D 5D 6D 7D 8D GND VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE 32 1 20 19 910 11 12 13 4 5 6 7 8 18 17 16 15 14 2Q 3Q 4Q 5Q 6Q 3D 4D 5D 6D 7D On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. |
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