10

(2) WRITE OPERATION

*1 : Maximum value is applicable if CE1 is kept at Low without any address change.

*3 : Write pulse is defined from High to Low transition of CE1, WE, LB or UB, whichever occurs last.

*4 : Applicable for byte mask only. Byte mask setup time is defined to the High to Low transition of CE1 or WE

whichever occurs last.

*5 : Applicable for byte mask only. Byte mask hold time is defined from the Low to High transition of CE1 or WE

whichever occurs first.

*6 : Write recovery is defined from Low to High transition of CE1, WE, LB or UB, whichever occurs first.

after CE1 is brought to Low.

*8 : If OE is Low after new address input, read cycle is initiated. In other word, OE must be brought to High at the

same time or before new address valid.

Parameter

Symbol

Value

Unit

Notes

Min

Max

Write Cycle Time

65

1000

ns

*1, *2

Address Setup Time

0

⎯

ns

*3

CE1 Write Pulse Width

40

⎯

ns

*3

WE Write Pulse Width

40

⎯

ns

*3

LB, UB Write Pulse Width

40

⎯

ns

*3

LB, UB Byte Mask Setup Time

− 5

⎯

ns

*4

LB, UB Byte Mask Hold Time

− 5

⎯

ns

*5

Write Recovery Time

0

⎯

ns

*6

CE1 High Pulse Width

12

⎯

ns

WE High Pulse Width

12

1000

ns

LB, UB High Pulse Width

12

1000

ns

Data Setup Time

12

⎯

ns

Data Hold Time

0

⎯

ns

OE High to CE1 Low Setup Time for Write

−5

⎯

ns

*7

OE High to Address Setup Time for Write

0

⎯

ns

*8

LB and UB Write Pulse Overlap

30

⎯

ns