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TSA5523M Datasheet(PDF) 8 Page - NXP Semiconductors |
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TSA5523M Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 20 page  1996 Dec 17 8 Philips Semiconductors Product specification 1.4 GHz I2C-bus controlled multimedia synthesizer TSA5523M Table 7 Read data format Notes 1. MSB is transmitted first. 2. A: Acknowledge. Table 8 Explanation to Table 7 Table 9 Analog-to-digital converter levels; note 1 Note 1. Accuracy is 0.03VCC1. BYTE MSB (1) LSB ACK Address Byte (ADB) 11000 MA1 MA0 1 A(2) Status Byte (SB) POR FL I2 I1 I0 A2 A1 A0 − SYMBOL DESCRIPTION POR power-on reset flag (POR = 1 at power-on) FL in-lock flag (FL = 1 when the loop is phase-locked) I2, I1 and I0 digital levels for I/O ports P2, P1 and P0 respectively A2, A1 and A0 digital outputs of the 5-level ADC VOLTAGE APPLIED ON PORT P6 A2 A1 A0 0.6VCC1 to VCC1 100 0.45VCC1 to 0.6VCC1 011 0.3VCC1 to 0.45VCC1 010 0.15VCC1 to 0.3VCC1 001 0 to 0.15VCC1 000 |
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