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EEVFC1A102LQ Datasheet(PDF) 5 Page - Texas Instruments |
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EEVFC1A102LQ Datasheet(HTML) 5 Page - Texas Instruments |
5 / 24 page www.ti.com DEVICE INFORMATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PTHXX040W (Top View) 16 PTH04040W SLTS238A – SEPTEMBER 2005 – REVISED FEBRUARY 2006 TERMINAL FUNCTIONS TERMINAL DESCRIPTION NAME NO. 1, 3, 5, 10, 13, This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc GND 16 reference for the control inputs. VI 2, 4, 6 The positive input voltage power node to the module, which is referenced to common GND. VO 9, 12, 15 The regulated positive power output with respect to the GND node. The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a lowlevel ground signal to this input disables the module’s output and turns off the output voltage. When Inhibit(1) 7 the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. Do not place an external pull-up on this pin. A 1%, 0.05-W resistor must be connected between this pin and GND to set the output voltage higher than the minimum value. The set-point range for the output voltage is from 0.8 V to 2.5 V. The resistor required for a given output voltage may be calculated from the following formula. If left open circuit, the VO Adjust 17 module output defaults to its lowest output voltage value. For further information on the adjustment and/or trimming of the output voltage, see the related Application Information section. Note: The specification table gives the preferred resistor values for a number of standard output voltages. The sense inputs allow the regulation circuit to compensate for voltage drop between the module and +Sense 11 the load. For optimal voltage accuracy, +Sense should be connected to VO. If it is left open, a low-value internal resistor ensures that the output remains in regulation. For optimal voltage accuracy, –Sense should be connected to the ground return at the load. If it is left –Sense 14 open, a low-value internal resistor ensures that the output remains in regulation. Connecting a resistor from this pin to signal ground allows the on threshold of the input undervoltage lockout (UVLO) to be adjusted higher than the default value. The hysterisis can also be independenly UVLO Prog 8 reduced by connecting a second resistor from this pin to VI. For further information, see the Application Information section. This is an analog control input that allows the output voltage to follow another voltage during power up and power down sequences. The pin is active from 0 V, up to the nominal set-point voltage. Within this range, the module output follows the voltage at the Track pin on a volt-for-volt basis. When the control Track 18 voltage is raised above this range, the module regulates at its nominal output voltage. If unused, this input should be connected to VI for a faster power up. For further information, see the related Application Information section. When this input is asserted to GND, the output voltage is decreased by 5% from the nominal. The input requires an open-collector (open-drain) interface. It is not TTL compatible. A lower percent change can Margin Down(1) 20 be accommodated with a series resistor. For further information, see the related Application Information section. When this input is asserted to GND, the output voltage is increased by 5%. The input requires an open Margin Up(1) 19 collector (open-drain) interface. It is not TTL compatible. The percent change can be reduced with a series resistor. For further information, see the related Application Information section. (1) Denotes negative logic: Open = Normal operation; Ground = Function active 5 Submit Documentation Feedback |
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