1998 Nov 19

9

Philips Semiconductors

Product specification

Transmit chain and synthesizer with

integrated VCO for DECT

UAA2068G

Table 2

Bit allocation; notes 1 and 2

Notes

1. X = don’t care.

2. In normal operation, only 8 bits are programmed into the register.

3. For normal operation, b15 to b8 do not need to be programmed.

4. The validation bit (b7) must be programmed with zero for normal operation.

5. Bit b6 is the MSB of the main divider coefficient.

6. The main divider ratio is equal to 1024 plus the programmed value (see Table 3).

Table 3

Main divider programming

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. Pins short-circuited internally must be short-circuited externally.

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is

desirable to take normal precautions appropriate to handling MOS devices.

FIRST

IN

REGISTER BIT ALLOCATION

LAST

IN

DATA FIELD

b5

b4

b3

b2

b1

b0

X

X

XXXXXX

0

b6

b5

b4

b3

b2

b1

b0

MAIN DIVIDER

RATIO

SYNTHESIZED

FREQUENCY (MHz)

Binary equivalent of n

1024 + n

1.728

× (1024 + n)

1000001

1089

1881.792

1001010

1098

1897.344

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

supply voltage

−0.3

+5.5

V

charge-pump supply voltage

−0.3

+5.5

V

−0.3

+5.5

V

∆GND

difference in ground supply voltage applied

between all ground pins

note 1

−

0.3

V

total power dissipation

−

275

mW

storage temperature

−55

+125

°C

operating ambient temperature

−10

+60

°C

junction temperature

−

150

°C