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CS4351 Datasheet(PDF) 11 Page - Cirrus Logic |
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CS4351 Datasheet(HTML) 11 Page - Cirrus Logic |
11 / 37 page DS566F1 11 CS4351 Switching Characteristics - Control Port - I²C® Format (Inputs: Logic 0 = GND, Logic 1 = VL, CL =20pF) Notes: 7. Data must be held for sufficient time to bridge the transition time, tfc, of SCL. Parameter Symbol Min Max Unit SCL Clock Frequency fscl - 100 kHz RST Rising Edge to Start tirs 500 - ns Bus Free Time Between Transmissions tbuf 4.7 - µs Start Condition Hold Time (prior to first clock pulse) thdst 4.0 - µs Clock Low time tlow 4.7 - µs Clock High Time thigh 4.0 - µs Setup Time for Repeated Start Condition tsust 4.7 - µs SDA Hold Time from SCL Falling (Note 7) thdd 0- µs SDA Setup time to SCL Rising tsud 250 - ns Rise Time of SCL and SDA trc, trc -1 µs Fall Time SCL and SDA tfc, tfc -300 ns Setup Time for Stop Condition tsusp 4.7 - µs Acknowledge Delay from SCL Falling tack 300 1000 ns t buf t hdst t lo w t hdd t high t sud Stop S ta rt SDA SC L t irs RS T t hdst t rc t fc t sust t susp Start Stop Re p e a ted t rd t fd t ack Figure 2. Control Port Timing - I²C Format |
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