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ICS548AMI-03LFT Datasheet(PDF) 5 Page - Integrated Device Technology |
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ICS548AMI-03LFT Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 7 page ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER 5 ICS548A-03 REV C 063006 AC Electrical Characteristics VDD = 3.3 V, Ambient Temperature -40 to +85 °C, unless stated otherwise Note 1: The phase relationship between input and output clocks can change at power up. Use the ICS570 or ICS527 Zero Delay Buffers for a guaranteed phase relationship. Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, clock input, PLL on fIN 10 120 MHz Input Frequency, clock input, PLL off fIN 0160 MHz Output Frequency (see table on page 2) fOUT Mode dependent 0 120 MHz Output Clock Rise Time tOR 0.8 to 2.0 V 0.84 ns Output Clock Fall Time tOF 2.0 to 0.8 V 0.74 ns Output Clock Duty Cycle tDC At VDD/2 45 50 55 % Output Enable Time, OE high to output on 50 ns Output Disable Time, OE to tri-state 50 ns Absolute Clock Period Jitter. PLL modes Deviation from mean 150 ps One Sigma Clock Period Jitter, PLL modes 60 ps Output clock skew for CLK, CLK, or CLK/2 At VDD/2 850 ps Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to Ambient θ JA Still air 120 °C/W θ JA 1 m/s air flow 115 °C/W θ JA 3 m/s air flow 105 °C/W Thermal Resistance Junction to Case θ JC 58 °C/W |
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