P4C164L datasheet(4/11 Pages) PYRAMID

Part #	P4C164L

Description	LOW POWER 8K x 8 STATIC CMOS RAM

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Manufacturer	PYRAMID [Pyramid Semiconductor Corporation]

Direct Link	http://www.pyramidsemiconductor.com

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4 / 11 page

P4C164L

Page 4 of 11

Document # SRAM116 REV B

READ CYCLE NO. 1 (

OE

OE CONTROLLED)(1)

NOTES:

READ CYCLE NO. 2 (ADDRESS CONTROLLED)

READ CYCLE NO. 3 (

CE

1,CE2 CONTROLLED)

Notes:

5.

WE is HIGH for READ cycle.

6.

CE

1 is LOW, CE2 is HIGH and OE is LOW for READ cycle.

7. ADDRESS must be valid prior to, or coincident with

CE

1 transition LOW

and CE

2 transition HIGH.

8. Transition is measured ± 200 mV from steady state voltage prior to

change, with loading as specified in Figure 1. This parameter is

sampled and not 100% tested.

9. READ Cycle Time is measured from the last valid address to the first

transitioning address.

10. Transitions caused by a chip enable control have similar delays

irrespective of whether

CE

1 or CE2 causes them.

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