INDUSTRIALTEMPERATURERANGE

IDT74FCT823AT/CT

HIGH-PERFORMANCECMOSBUSINTERFACEREGISTER

1

JUNE 2006

INDUSTRIAL TEMPERATURE RANGE

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

© 2006 Integrated Device Technology, Inc.

DSC-5487/4

FEATURES:

• A and C grades

• Low input and output leakage

≤≤≤≤≤1µA (max.)

• CMOS power levels

• True TTL input and output compatibility:

• Meets or exceeds JEDEC standard 18 specifications

• Power off disable outputs permit "live insertion"

• Available in the SOIC and QSOP packages

FUNCTIONAL BLOCK DIAGRAM

IDT74FCT823AT/CT

HIGH-PERFORMANCE

CMOS BUS

INTERFACE REGISTER

DESCRIPTION:

The FCT823T series is built using an advanced dual metal CMOS

technology. The FCT823T series bus interface registers are designed to

eliminate the extra packages required to buffer existing registers and

provide extra data width for wider address/data paths or buses carrying

parity. The FCT823T is a 9-bit wide buffered register with Clock Enable

(

EN) and Clear (CLR) – ideal for parity bus interfacing in high-performance

microprogrammed systems.

The FCT823T high-performance interface family can drive large capacitive

loads, while providing low-capacitance bus loading at both inputs and

outputs. All inputs have clamp diodes and all outputs are designed for low-

capacitance bus loading in high-impedance state.

D

Q

CL

D

Q

CL

EN

CLR

CP

OE