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CS5560 Datasheet(PDF) 10 Page - Cirrus Logic |
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CS5560 Datasheet(HTML) 10 Page - Cirrus Logic |
10 / 32 page CS5560 10 DS713A5 7/31/07 SWITCHING CHARACTERISTICS (CONTINUED) TA = -40 to +85 °C; V1+ = V2+ = +2.5 V, ±5%; V1- = V2- = -2.5 V, ±5%; VL - VLR = 3.3 V, ±5%, 2.5 V, ±5%, or 1.8 V, ±5% Input levels: Logic 0 = 0V; Logic 1 = VD+; CL = 15 pF. Parameter Symbol Min Typ Max Unit Calibration Register Read Timing CS hold time (high) after SCLK rising t22 10 - ns Data setup time before SCLK rising t23 10 - - ns Data hold time after SCLK rising t24 10 - - ns SCLK rising to data stable t25 -10- ns Data hold time after SCLK rising t26 -10- ns SCLK rising to CS rising t27 10 - - ns SDO tristate after CS rising t28 -5 - ns SCLK(i) SDI CS LSB MSB MSB Command Time 8 SCLKs Data Time 24 SCLKs SDO t22 t24 t23 t27 t25 t26 t28 LSB Figure 4. SEC Mode - Calibration Register Read Timing (Not to Scale) |
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