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C8051F531-IM Datasheet(PDF) 4 Page - Silicon Laboratories |
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C8051F531-IM Datasheet(HTML) 4 Page - Silicon Laboratories |
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4 / 220 page  C8051F52x-53x 4 Rev. 0.3 9.1.1. Instruction and CPU Timing ..................................................................... 76 9.1.2. MOVX Instruction and Program Memory ................................................. 77 9.2. Register Descriptions........................................................................................ 80 9.3. Power Management Modes .............................................................................. 83 9.3.1. Idle Mode.................................................................................................. 84 9.3.2. Stop Mode ................................................................................................ 84 10. Memory Organization and SFRs ........................................................................... 85 10.1.Program Memory.............................................................................................. 85 10.2.Data Memory .................................................................................................... 86 10.3.General Purpose Registers .............................................................................. 86 10.4.Bit Addressable Locations ................................................................................ 86 10.5.Stack................................................................................................................. 86 10.6.Special Function Registers............................................................................... 87 11. Interrupt Handler .................................................................................................... 91 11.1.MCU Interrupt Sources and Vectors................................................................. 91 11.2.Interrupt Priorities ............................................................................................. 91 11.3.Interrupt Latency............................................................................................... 91 11.4.Interrupt Register Descriptions ......................................................................... 93 11.5.External Interrupts ............................................................................................ 97 12. Reset Sources......................................................................................................... 99 12.1.Power-On Reset ............................................................................................. 100 12.2.Power-Fail Reset / VDD Monitor .................................................................... 101 12.3.External Reset ................................................................................................ 102 12.4.Missing Clock Detector Reset ........................................................................ 102 12.5.Comparator Reset .......................................................................................... 102 12.6.PCA Watchdog Timer Reset .......................................................................... 103 12.7.Flash Error Reset ........................................................................................... 103 12.8.Software Reset ............................................................................................... 103 13. Flash Memory ....................................................................................................... 107 13.1.Programming The Flash Memory ................................................................... 107 13.1.1.Flash Lock and Key Functions ............................................................... 107 13.1.2.Flash Erase Procedure .......................................................................... 108 13.1.3.Flash Write Procedure ........................................................................... 108 13.2.Flash Write and Erase Guidelines .................................................................. 109 13.2.1.VDD Maintenance and the VDD monitor ................................................. 110 13.2.2.PSWE Maintenance ............................................................................... 111 13.2.3.System Clock ......................................................................................... 111 13.3.Non-volatile Data Storage .............................................................................. 112 13.4.Security Options ............................................................................................. 112 14. Port Input/Output.................................................................................................. 117 14.1.Priority Crossbar Decoder .............................................................................. 119 14.2.Port I/O Initialization ....................................................................................... 123 14.3.General Purpose Port I/O ............................................................................... 125 15. Oscillators ............................................................................................................. 133 15.1.Programmable Internal Oscillator ................................................................... 133 |
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