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C8051T600 Datasheet(PDF) 5 Page - Silicon Laboratories |
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C8051T600 Datasheet(HTML) 5 Page - Silicon Laboratories |
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5 / 168 page  Rev. 0.5 5 C8051T600/1/2/3/4/5 14.4.3.Data Register ......................................................................................... 116 14.5.SMBus Transfer Modes.................................................................................. 117 14.5.1.Master Transmitter Mode ....................................................................... 117 14.5.2.Master Receiver Mode ........................................................................... 118 14.5.3.Slave Receiver Mode ............................................................................. 119 14.5.4.Slave Transmitter Mode ......................................................................... 120 14.6.SMBus Status Decoding................................................................................. 120 15. UART0.................................................................................................................... 123 15.1.Enhanced Baud Rate Generation................................................................... 124 15.2.Operational Modes ......................................................................................... 125 15.2.1.8-Bit UART ............................................................................................. 125 15.2.2.9-Bit UART ............................................................................................. 126 15.3.Multiprocessor Communications .................................................................... 126 16. Timers.................................................................................................................... 131 16.1.Timer 0 and Timer 1 ....................................................................................... 131 16.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 131 16.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 133 16.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 133 16.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 134 16.2.Timer 2 .......................................................................................................... 139 16.2.1.16-bit Timer with Auto-Reload................................................................ 139 16.2.2.8-bit Timers with Auto-Reload................................................................ 140 17. Programmable Counter Array ............................................................................. 143 17.1.PCA Counter/Timer ........................................................................................ 144 17.2.Capture/Compare Modules ............................................................................ 145 17.2.1.Edge-triggered Capture Mode................................................................ 146 17.2.2.Software Timer (Compare) Mode........................................................... 147 17.2.3.High Speed Output Mode....................................................................... 148 17.2.4.Frequency Output Mode ........................................................................ 149 17.2.5.8-Bit Pulse Width Modulator Mode......................................................... 150 17.2.6.16-Bit Pulse Width Modulator Mode....................................................... 151 17.3.Watchdog Timer Mode ................................................................................... 151 17.3.1.Watchdog Timer Operation .................................................................... 152 17.3.2.Watchdog Timer Usage ......................................................................... 153 17.4.Register Descriptions for PCA........................................................................ 154 18. Revision Specific Behavior ................................................................................. 159 18.1.Revision Identification..................................................................................... 159 18.2.SAR Clock Maximum...................................................................................... 160 18.3.VDD Monitor Oscillation .................................................................................. 160 19. C2 Interface ........................................................................................................... 161 19.1.C2 Interface Registers.................................................................................... 161 19.2.C2 Pin Sharing ............................................................................................... 166 Contact Information.................................................................................................. 168 |
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Similar Description - C8051T600 |
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