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SI3010-F-FS Datasheet(PDF) 1 Page - Silicon Laboratories |
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SI3010-F-FS Datasheet(HTML) 1 Page - Silicon Laboratories |
1 / 76 page Rev. 1.0 12/05 Copyright © 2005 by Silicon Laboratories Si2401 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si2401 V.22BIS ISOMODEM® WITH INTEGRATED GLOBAL DAA Features Applications Description The Si2401 ISOmodem® is a complete, two-chip 2400 bps modem integrating Silicon Labs’ third-generation direct access arrangement (DAA), which provides a globally-programmable telephone line interface with an unprecedented level of integration. Available in two 16-pin SOIC packages, this compact solution eliminates the need for a separate DSP data pump, modem controller, codec, isolation transformer, relay, opto-isolators, and 2–4 wire hybrid. The Si2401 provides conventional data formats at connect rates of up to 2400 bps with full- duplex operation over the Public Switched Telephone Network (PSTN). Additionally, the Si2401 is fully-programmable to meet global standards with a single design. Other features include fast connect times for electronic point-of- sale (EPOS) applications and alarm protocols for security systems. The device is ideal for embedded modem applications due to its small size, low external component count, and low power consumption. Functional Block Diagram Data modem formats 2400 bps: V.22bis 1200 bps: V.22, V.23, Bell 212A 300 bps: V.21, Bell 103 Fast connect and V.23 reversing SIA and other security protocols 27 MHz CLKIN support Caller ID detection and decoding UART with flow control Integrated third-generation DAA Fewer external components required Over 5000 V capacitive isolation Parallel phone detect Globally-compliant line interface AT command set support Call progress support 3.3 V Power Lead-free, RoHS-compliant packages Set-top boxes Point-of-sale ATM terminals Security systems Medical monitoring Power meters µ Controller (AT Decoder, Call Progress) Control Interface Clock Interface DSP (Data Pump) RXD TXD RESET EOFR/GPIO1 ESC/GPIO3 CD/GPIO2 INT/GPIO4 XOUT XTALI Si2401 Si3010 CTS Hybrid, AC and DC Terminations Ring Detect Off-Hook IB SC DCT VREG2 DCT2 DCT3 RNG1 RNG2 QB QE QE2 RX Isolation Interface VREG RI/GPIO5 U.S. Patent #5,870,046 U.S. Patent #6,061,009 Other patents pending Ordering Information See page 72. Pin Assignments 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 CLKIN/XTALI XTALO CTS V D TXD RXD RESET GPIO5/RI GPIO1/EOFR GPIO2/CD GPIO3/ESC V A GND GPIO4/INT/AOUT C1A C2A 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 QE DCT VREG IB C2B C1B RNG1 RX DCT2 IGND DCT3 QB QE2 SC VREG2 RNG2 Si2401 Si3010 |
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