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BS62LV8001ECG55 Datasheet(PDF) 1 Page - Brilliance Semiconductor

Part # BS62LV8001ECG55
Description  Very Low Power CMOS SRAM 1M X 8 bit
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Manufacturer  BSI [Brilliance Semiconductor]
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BS62LV8001ECG55 Datasheet(HTML) 1 Page - Brilliance Semiconductor

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Very Low Power CMOS SRAM
1M X 8 bit
BS62LV8001
R0201-BS62LV8001
Revision
2.3
May.
2006
1
Pb-Free and Green package materials are compliant to RoHS
n FEATURES
Ÿ Wide V
CC operation voltage : 2.4V ~ 5.5V
Ÿ Very low power consumption :
VCC = 3.0V
Operation current : 31mA (Max.) at 55ns
2mA (Max.) at 1MHz
Standby current :
0.8uA (Typ.) at 25
OC
VCC = 5.0V
Operation current : 76mA (Max.) at 55ns
10mA (Max.) at 1MHz
Standby current :
3.5uA (Typ.) at 25
OC
Ÿ High speed access time :
-55
55ns (Max.) at VCC : 3.0~5.5V
-70
70ns (Max.) at VCC : 2.7~5.5V
Ÿ Automatic power down when chip is deselected
Ÿ Easy expansion with CE1, CE2 and OE options
Ÿ Three state outputs and TTL compatible
Ÿ Fully static operation
Ÿ Data retention supply voltage as low as 1.5V
n DESCRIPTION
The BS62LV8001 is a high performance, very low power CMOS
Static Random Access Memory organized as 1,048,576 by 8 bits
and operates form a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical CMOS standby
current of 0.8uA at 3.0V/25
OC and maximum access time of 55ns at
3.0V/85
OC.
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2), and active LOW output
enable (OE) and three-state output drivers.
The BS62LV8001 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BS62LV8001 is available in DICE form, JEDEC standard 44-pin
TSOP II and 48-ball BGA package.
n POWER CONSUMPTION
POWER DISSIPATION
STANDBY
(ICCSB1, Max)
Operating
(ICC, Max)
VCC=5.0V
VCC=3.0V
PRODUCT
FAMILY
OPERATING
TEMPERATURE
VCC=5.0V
VCC=3.0V
1MHz
10MHz
fMax.
1MHz
10MHz
fMax.
PKG TYPE
BS62LV8001DC
DICE
BS62LV8001EC
TSOP II-44
BS62LV8001FC
Commercial
+0
OC to +70OC
25uA
4.0uA
9mA
39mA
75mA
1.5mA
19mA
30mA
BGA-48-0912
BS62LV8001EI
TSOP II-44
BS62LV8001FI
Industrial
-40
OC to +85OC
50uA
8.0uA
10mA
40mA
76mA
2mA
20mA
31mA
BGA-48-0912
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
Brilliance Semiconductor, Inc. reserves the right to change products and specifications without notice.
A4
A3
A2
A1
A0
CE1
NC
NC
DQ0
DQ1
VCC
VSS
DQ2
DQ3
NC
NC
WE
A19
A18
A17
A16
A15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
BS62LV8001EC
BS62LV8001EI
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
CE2
A8
NC
NC
DQ7
DQ6
VSS
VCC
DQ5
DQ4
NC
NC
A9
A10
A11
A12
A13
A14
G
H
F
E
D
C
B
A
1
2
3
4
5
6
A9
A11
A10
A19
A12
A14
A13
A15
WE
NC
NC
NC
DQ7
A17
A16
A7
VSS
VCC
DQ2
DQ1
DQ6
DQ5
NC
A5
OE
A3
A0
A6
A4
A1
A2
CE2
NC
NC
NC
CE1
DQ4
NC
48-ball BGA top view
NC
NC
DQ0
VSS
VCC
DQ3
NC
A18
NC
A8
Address
Input
Buffer
Row
Decoder
Memory Array
2048 x 4096
Column I/O
Write Driver
Sense Amp
Column Decoder
Address Input Buffer
A8
A2 A1 A0 A10
Data
Input
Buffer
Control
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
A13
A17
A15
A18
A16
A14
A12
A7
A6
A5
A4
8
8
8
8
18
512
4096
2048
22
A9
A11
Data
Output
Buffer
A3
CE1
CE2
WE
OE
VCC
VSS
A19


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