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BS616UV4016DIP10 Datasheet(PDF) 2 Page - Brilliance Semiconductor

Part # BS616UV4016DIP10
Description  Ultra Low Power CMOS SRAM 256K X 16 bit
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Manufacturer  BSI [Brilliance Semiconductor]
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Logo BSI - Brilliance Semiconductor

BS616UV4016DIP10 Datasheet(HTML) 2 Page - Brilliance Semiconductor

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BS616UV4016
R0201-BS616UV4016
Revision
1.6
May.
2006
2
n PIN DESCRIPTIONS
Name
Function
A0-A17 Address Input
These 18 address inputs select one of the 262,144 x 16-bit in the RAM
CE Chip Enable Input
CE is active LOW. Chip enable must be active when data read form or write to the
device. If chip enable is not active, the device is deselected and is in standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
WE Write Enable Input
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
OE Output Enable Input
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
LB and UB Data Byte Control Input
Lower byte and upper byte data input/output control pins.
DQ0-DQ15 Data Input/Output
Ports
There 16 bi-directional ports are used to read data from or write data into the RAM.
VCC
Power Supply
VSS
Ground
n TRUTH TABLE
MODE
CE
WE
OE
LB
UB
IO0~IO7
IO8~IO15
VCC CURRENT
H
X
X
X
X
High Z
High Z
ICCSB, ICCSB1
Chip De-selected
(Power Down)
X
X
X
H
H
High Z
High Z
ICCSB, ICCSB1
L
H
H
L
X
High Z
High Z
ICC
Output Disabled
L
H
H
X
L
High Z
High Z
ICC
L
L
DOUT
DOUT
ICC
H
L
High Z
DOUT
ICC
Read
L
H
L
L
H
DOUT
High Z
ICC
L
L
DIN
DIN
ICC
H
L
X
DIN
ICC
Write
L
L
X
L
H
DIN
X
ICC
NOTES: H means VIH; L means VIL; X means don’t care (Must be VIH or VIL state)


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