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MB82DBS02163C-70LWT Datasheet(PDF) 8 Page - Fujitsu Component Limited. |
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MB82DBS02163C-70LWT Datasheet(HTML) 8 Page - Fujitsu Component Limited. |
8 / 63 page MB82DBS02163C-70L 8 • Address Key The address key has the following format. *1: It is prohibited to apply this key. *2: If M = 0, all the registers must be set with appropriate Key input at the same time. *3: If M = 1, PS must be set with appropriate Key input at the same time. Except for PS, all the other key inputs must be "1". *4: Burst Read & Single Write is not supported at WE Single Clock Pulse Control. *5: A8 and A6 to A0 must be all "1" in any cases. Address Pin Register Name Function Key Description Note A20, A19 PS Partial Size 00 8 M-bit Partial 01 4 M-bit Partial 10 Reserved for future use *1 11 Sleep [Default] A18 to A16 BL Burst Length 000 Reserved for future use *1 001 Reserved for future use *1 010 8 words 011 16 words 100 Reserved for future use *1 101 Reserved for future use *1 110 Reserved for future use *1 111 Continuous A15 MMode 0 Synchronous Mode (Burst Read / Write) *2 1 Asynchronous Mode [Default] (Page Read / Normal Write) *3 A14 to A12 RL Read Latency 000 Reserved for future use *1 001 3 clocks 010 4 clocks 011 5 clocks 1xx Reserved for future use *1 A11 BS Burst Sequence 0 Reserved for future use *1 1 Sequential A10 SW Single Write 0 Burst Read & Burst Write 1 Burst Read & Single Write *4 A9 VE Valid Clock Edge 0 Falling Clock Edge 1 Rising Clock Edge A8 ⎯⎯ 1 Unused bits must be 1 *5 A7 WC Write Control 0 WE Single Clock Pulse Control without Write Suspend Function *4 1WE Level Control with Write Suspend Function A6 to A0 ⎯⎯ 1 Unused bits must be 1 *5 |
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