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SN75C1167DBR Datasheet(PDF) 6 Page - Texas Instruments |
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SN75C1167DBR Datasheet(HTML) 6 Page - Texas Instruments |
6 / 18 page SN65C1167, SN75C1167, SN65C1168, SN75C1168 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS159E − MARCH 1993 − REVISED NOVEMBER 2003 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going input threshold voltage, differential input 0.2 V VIT− Negative-going input threshold voltage, differential input −0.2‡ V Vhys Input hysteresis (VIT+ − VIT−) 60 mV VIK Input clamp voltage, RE SN75C1167 II = −18 mA −1.5 V VOH High-level output voltage VID = 200 mV, IOH = −6 mA 3.8 4.2 V VOL Low-level output voltage VID = −200 mV, IOL = 6 mA 0.1 0.3 V IOZ High-impedance-state output current SN75C1167 VO = VCC or GND ±0.5 ±5 µA II Line input current Other input at 0 V VI = 10 V 1.5 mA II Line input current Other input at 0 V VI = −10 V −2.5 mA II Enable input current, RE SN75C1167 VI = VCC or GND ±1 µA ri Input resistance VIC = −7 V to 7 V, Other input at 0 V 4 17 k Ω VI = VCC or GND 4 6 ICC Supply current (total package) No load, Enabled VIH = 2.4 V or 0.5 V, See Note 5 5 9 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode input voltage and threshold voltage levels only. NOTE 5: Refer to TIA/EIA-422-B for exact conditions. switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Note 8) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT tPLH Propagation delay time, low- to high-level output See Figure 5 9 17 27 ns tPHL Propagation delay time, high- to low-level output See Figure 5 9 17 27 ns tTLH Transition time, low- to high-level output VIC = 0 V, See Figure 5 4 9 ns tTHL Transition time, high- to low-level output VIC = 0 V, See Figure 5 4 9 ns tPZH Output enable time to high level 13 22 ns tPZL Output enable time to low level RL = 1 kW, See Figure 6 13 22 ns tPHZ Output disable time from high level RL = 1 kW, See Figure 6 13 22 ns tPLZ Output disable time from low level 13 22 ns † All typical values are at VCC = 5 V and TA = 25°C. NOTE 8: Measured per input while the other inputs are at VCC or GND |
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