7

Function

CLK

CE

RS

Select Dot Register

Not

Rising

↓

Load Dot Register

DIN = HIGH, LED = "ON"

DIN = LOW, LED = "OFF"

↑

LX

Copy Data from Dot

Register to Dot Latch

LH

X

Select Control Register

Not

Rising

↓

H

↑

LX

LH

X

Table 1. Register Truth Table

Figure 3. Write Cycle Timing Diagram

Dot Register

The Dot Register holds the pattern to be displayed by

the LEDs. Data is loaded into the Dot Register according

to the procedure shown in Table 1 and Figure 3.

First RS is brought low, then CE is brought low. Next,

each successive rising CLK edge will shift in the data at

the DIN pin. Loading a logic high will turn the

corresponding LED on; a logic low turns the LED off.

When all 160 bits have been loaded (or 320 bits in an

8-digit display), CE is brought to logic high.

When CLK is next brought to logic low, new data is

latched into the display dot drivers. Loading data into

the Dot Register takes place while the previous data is

displayed and eliminates the need to blank the display

while loading data.

Notes:

for serial mode or High for simultaneous mode.

Control Shift Register. The unselected control word retains its

previous value.

NOTE:

1. DATA IS COPIED TO THE CONTROL REGISTER OR THE DOT LATCH AND LED OUTPUTS WHEN CE IS HIGH AND CLK IS LOW.

RSH

T

CES

T

CLKH

T

CLKL

T

CEH

T

DS

T

DH

T

CEDO

T

DOUT

T

DOUTP

T

PREVIOUS DATA

NEW DATA

12

11

4

3

5

1

6

2

7

10

8

9

NEW DATA LATCHED HERE

[1]

CE

RS

CLK

D

IN

LED OUTPUTS,

CONTROL

REGISTERS

(SIMULTANEOUS)

OUT

D

D

(SERIAL)

OUT