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HCTL-2000 Datasheet(PDF) 8 Page - AVAGO TECHNOLOGIES LIMITED |
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HCTL-2000 Datasheet(HTML) 8 Page - AVAGO TECHNOLOGIES LIMITED |
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8 / 19 page  8 Figure 7. Simplified Digital Noise Filter Logic. Quadrature Decoder The quadrature decoder decodes the incoming filtered signals into count information. This circuitry multiplies the resolution of the input signals by a factor of four (4X decoding). When using an encoder for motion sensing, the user benefits from the increased resolution by being able to provide better system control. The quadrature decoder samples the outputs of the CHA and CHB filters. Based on the past binary state of the two signals and the present state, it outputs a count signal and a direction signal to the internal position counter. In the case of the HCTL-2020, the signals also go to external pins 5 and 16 respectively. Figure 9 shows the quadrature states and the valid state transi- tions. Channel A leading channel B results in counting up. Channel B leading channel A results in counting down. Illegal state transitions, caused by faulty encoders or noise severe enough to pass through the filter, will produce an erroneous count. Design Considerations The designer should be aware that the operation of the digital filter places a timing constraint on the relationship between incoming quadrature signals and the external clock. Figure 8 shows the timing waveform with an incremental encoder input. Since an input has to be stable for three rising clock edges, the encoder pulse width (tE - low or high) has to be greater than three clock periods (3tCLK). This guarantees that the asynchronous input will be stable during three consecutive rising clock edges. A realistic design also has to take Figure 8. Signal Propagation through Digital Noise Filter. |
Similar Part No. - HCTL-2000_06 |
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Similar Description - HCTL-2000_06 |
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