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X25170XG Datasheet(PDF) 7 Page - IC MICROSYSTEMS |
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X25170XG Datasheet(HTML) 7 Page - IC MICROSYSTEMS |
7 / 15 page X25170 Characteristics subject to change without notice. 7 of 15 Figure 5. Page Write Operation Sequence Figure 6. Write Status Register Operation Sequence 32 33 34 35 36 37 38 39 SCK SI CS 0123456789 10 SCK SI Instruction 16 Bit Address Data Byte 1 7 6543210 CS 40 41 42 43 44 45 46 47 Data Byte 2 76543210 Data Byte 3 76543210 Data Byte N 15 14 13 321 0 20 21 22 23 24 25 26 27 28 29 30 31 6543210 0123456789 CS SCK SI SO High Impedance Instruction Data Byte 7654 32 10 10 11 12 13 14 15 Operational Notes The X25170 powers-up in the following state: – The device is in the low power standby state. – A HIGH to LOW transition on CS is required to enter an active state and receive an instruction. – SO pin is high impedance. – The “write enable” latch is reset. Data Protection The following circuitry has been included to prevent inadvertent writes: – The “write enable” latch is reset upon power-up. – A WREN instruction must be issued to set the “write enable” latch. –CS must come HIGH at the proper clock count in order to start a write cycle. |
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Similar Description - X25170XG |
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