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TMS320DM6431 Datasheet(PDF) 1 Page - Texas Instruments

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Part # TMS320DM6431
Description  Digital Media Processor
Download  225 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320DM6431 Datasheet(HTML) 1 Page - Texas Instruments

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1
TMS320DM6431 Digital Media Processor
1.1 Features
TMS320DM6431
Digital Media Processor
SPRS342A – NOVEMBER 2006 – REVISED MARCH 2007
• High-Performance Digital Media Processor
• C64x+ L1/L2 Memory Architecture
(DM6431)
256K-Bit (32K-Byte) L1P Program
3.33-ns Instruction Cycle Time
RAM/Cache [Flexible Allocation]
300-MHz C64x+™ Clock Rate
256K-Bit (32K-Byte) L1D Data RAM/Cache
[Flexible Allocation]
Eight 32-Bit C64x+ Instructions/Cycle
512K-Bit (64K-Byte) L2 Unified Mapped
2400 MIPS
RAM/Cache [Flexible Allocation]
Fully Software-Compatible With C64x
• Supports Little Endian Mode Only
Commercial and Extended Temperature
Ranges
• Video Processing Subsystem (VPSS), VPFE
Only
• VelociTI.2™ Extensions to VelociTI™
Front End Provides:
Advanced Very-Long-Instruction-Word (VLIW)
TMS320C64x+™ DSP Core
• CCD and CMOS Imager Interface
Eight Highly Independent Functional Units
• BT.601/BT.656 Digital YCbCr 4:2:2
With VelociTI.2 Extensions:
(10-Bit) Interface
• Six ALUs (32-/40-Bit), Each Supports
• Glueless Interface to Common Video
Single 32-Bit, Dual 16-Bit, or Quad 8-Bit
Decoders
Arithmetic per Clock Cycle
• External Memory Interfaces (EMIFs)
• Two Multipliers Support Four 16 x 16-Bit
16-Bit DDR2 SDRAM Memory Controller
Multiplies (32-Bit Results) per Clock
With 128M-Byte Address Space (1.8-V I/O)
Cycle or Eight 8 x 8-Bit Multiplies (16-Bit
Asynchronous 8-Bit Wide EMIF (EMIFA)
Results) per Clock Cycle
With up to 64M-Byte Address Reach
Load-Store Architecture With Non-Aligned
• Flash Memory Interfaces
Support
• NOR (8-Bit-Wide Data)
64 32-Bit General-Purpose Registers
• NAND (8-Bit-Wide Data)
Instruction Packing Reduces Code Size
• Enhanced Direct-Memory-Access (EDMA)
All Instructions Conditional
Controller (64 Independent Channels)
Additional C64x+™ Enhancements
• Two 64-Bit General-Purpose Timers (Each
• Protected Mode Operation
Configurable as Two 32-Bit Timers)
• Exceptions Support for Error Detection
• One 64-Bit Watch Dog Timer
and Program Redirection
• Hardware Support for Modulo Loop
• One UART With RTS and CTS Flow Control
Auto-Focus Module Operation
• Master/Slave Inter-Integrated Circuit (I2C
• C64x+ Instruction Set Features
Bus™)
Byte-Addressable (8-/16-/32-/64-Bit Data)
• One Multichannel Buffered Serial Port
8-Bit Overflow Protection
(McBSP0)
Bit-Field Extract, Set, Clear
I2S and TDM
Normalization, Saturation, Bit-Counting
AC97 Audio Codec Interface
VelociTI.2 Increased Orthogonality
SPI
C64x+ Extensions
Standard Voice Codec Interface (AIC12)
• Compact 16-bit Instructions
Telecom Interfaces – ST-Bus, H-100
• Additional Instructions to Support
128 Channel Mode
Complex Multiplies
• Multichannel Audio Serial Port (McASP0)
Four Serializers and SPDIF (DIT) Mode
• High-End CAN Controller (HECC)
• 10/100 Mb/s Ethernet MAC (EMAC)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
All trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
Copyright © 2006–2007, Texas Instruments Incorporated
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.


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