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PPC405EX-SPAFFFTX Datasheet(PDF) 5 Page - Applied Micro Circuits Corporation |
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PPC405EX-SPAFFFTX Datasheet(HTML) 5 Page - Applied Micro Circuits Corporation |
5 / 67 page PPC405EX – PowerPC 405EX Embedded Processor Revision 1.09 - August 21, 2007 AMCC Proprietary 5 Preliminary Data Sheet Block Diagram Figure 1. PPC405EX Embedded Controller Functional Block Diagram The PPC405EX is designed using the IBM Microelectronics Blue LogicTM methodology in which major functional blocks are integrated together to create an ASIC (application-specific integrated circuit) product. This approach provides a consistent way to create complex ASICs using IBM CoreConnectTM Bus Architecture. DCR GPIO IICx2/ MAL/w Ethernet DMA Bridges Clock Control Reset Power Mgmt JTAG Trace Timers MMU Controller OPB/PLB Arbiter (4-Channel) DCRs Arbiter UART x2 SCP (SPI) 16KB I-Cache 16KB D-Cache On-chip Peripheral Bus (OPB) Processor Local Bus (PLB4)—128 bits Power PC 405 Processor 1Gbit Bus BSC MAC x2 Interrupt Controller Universal x3 Security Feature HSS PCI-E Interrupt Coalescing USB 2.0 Controller NAND Flash Controller EIP-94 SDRAM Controller DDR1/2 OTG ULPI GPT EBM EBC HSS PCI-E PKA TRNG AHB-PLB Bridge 1-lane 1-lane |
Similar Part No. - PPC405EX-SPAFFFTX |
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Similar Description - PPC405EX-SPAFFFTX |
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