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PPC440SP-AFC533C Datasheet(PDF) 7 Page - Applied Micro Circuits Corporation |
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PPC440SP-AFC533C Datasheet(HTML) 7 Page - Applied Micro Circuits Corporation |
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7 / 85 page  PowerPC 440SP Embedded Processor Revision 1.23 - Sept 26, 2006 AMCC Proprietary 7 Data Sheet DDR PCI-X Space (HB) Reserved 0000 0009 0000 0000 0000 0009 07FF FFFF PCIX0 I/O 0000 0009 0800 0000 0000 0009 0800 FFFF 64KB PCIX1 I/O 0000 0009 1800 0000 0000 0009 1800 FFFF 64KB PCIX2 I/O 0000 0009 2800 0000 0000 0009 2800 FFFF 64KB PCIX0 Addressing Config. Regs 0000 0009 0EC0 0000 0000 0009 0EC0 0007 8B PCIX1 Addressing Config. Regs 0000 0009 1EC0 0000 0000 0009 1EC0 0007 8B PCIX2 Addressing Config. Regs 0000 0009 2EC0 0000 0000 0009 2EC0 0007 8B PCIX0 Core Config. Regs 0000 0009 0EC8 0000 0000 0009 0EC8 0FFF 4KB PCIX1 Core Config. Regs 0000 0009 1EC8 0000 0000 0009 1EC8 0FFF 4KB PCIX2 Core Config. Regs 0000 0009 2EC8 0000 0000 0009 2EC8 0FFF 4KB PCIX0 Simple Message Passing 0000 0009 0EC8 1100 0000 0009 0EC8 11FF 256B PCIX1 Simple Message Passing 0000 0009 1EC8 1100 0000 0009 1EC8 11FF 256B PCIX2 Simple Message Passing 0000 0009 2EC8 1100 0000 0009 2EC8 11FF 256B PCIX0 Special Cycle 0000 0009 0ED0 0000 0000 0009 0EDF FFFF 1MB PCIX1 Special Cycle 0000 0009 1ED0 0000 0000 0009 1EDF FFFF 1MB PCIX2 Special Cycle 0000 0009 2ED0 0000 0000 0009 2EDF FFFF 1MB Reserved 0000 0009 2EE0 0000 0000 0009 2EFF FFFF PCI Memory 0000 0009 2F00 0000 0000 0009 FFBF FFFF 3.3GB Reserved 0000 0009 FFC0 0000 0000 0009 FFDF FFFF PCI Boot ROM (PCI Memory) 0000 0009 FFE0 0000 0000 0009 FFFF FFFF 2MB PCI Memory 0000 000A 0000 0000 0000 000F FFFF FFFF 24GB Reserved4 0000 0010 0000 0000 03FF FFFF FFFF FFFF Reserved5 0400 0010 0000 0000 07FF FFFF FFFF FFFF DDR PCI-X Space (HB) PCI Memory 0800 0000 0000 0000 FFFF FFFF FFFF FFFF 15.7EB Notes: 1. DDR SDRAM and on-chip SRAM can be located anywhere in the Local Memory area of the memory map. 2. The Boot ROM and Expansion ROM areas of the memory map are intended for use by ROM or Flash-type devices. While locating volatile DDR SDRAM and SRAM in this region is supported, use of these regions for this purpose is not recommended. 3. When the optional boot from PCI-X memory is selected, the PCI-X Boot ROM address space begins at 9 FFE0 0000 (128 KB). 4. Never decoded. 5. Unpredictable results on Read and Write operations. 6. Accessed by means of EBC Peripheral Bank Configuration Registers Table 1. System Memory Address Map (Sheet 2 of 2) Function Sub Function Start Address End Address Size |
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