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± 1%

50

Ω

1.5 V

1.5 V

3 V

≈ 2 V

≈ –2 V

90%

10%

0 V

and Instrumentation

Capacitance

D

A

B

DE

Input

Generator

90%

0 V

10%

± 1%

Input

Generator

50

Ω

3 V

S1

0.5 V

3 V

0 V

≈ 0 V

1.5 V

1.5 V

and Instrumentation

Capacitance

D

A

B

DE

2.3 V

Input

Generator

50

Ω

3 V

S1

3 V

1.5 V

1.5 V

2.3 V

0.5 V

≈ 3 V

0 V

± 1%

and Instrumentation

Capacitance

D

A

B

DE

≈ 3 V

SN75HVD08, SN65HVD08

SLLS550C – NOVEMBER 2002 – REVISED JULY 2006

PARAMETER MEASUREMENT INFORMATION (continued)

Figure 3. Driver Switching Test Circuit and Voltage Waveforms

Figure 4. Driver High-Level Enable and Disable Time Test Circuit and Voltage Waveforms

Figure 5. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms

5

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