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AD9245BCPZ-202 Datasheet(PDF) 3 Page - Analog Devices

Part # AD9245BCPZ-202
Description  14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 3 V A/D Converter
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9245BCPZ-202 Datasheet(HTML) 3 Page - Analog Devices

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AD9245
Rev. D | Page 3 of 32
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference, unless otherwise noted.
Table 1.
AD9245BCP-20
AD9245BCP-40
AD9245BCP-65
Parameter
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
14
14
14
Bits
ACCURACY
No Missing Codes Guaranteed
14
14
14
Bits
Offset Error
±0.30
±1.60
±0.50
±1.75
±0.50
±1.75
% FSR
Gain Error1
±0.30
±3.25
±0.50
±3.25
±0.50
±6.90
% FSR
Differential Nonlinearity (DNL)2
±0.50
±1.00
±0.50
±1.00
±0.50
±1.00
LSB
Integral Nonlinearity (INL)2
±1.20
±3.10
±1.40
±3.40
±1.60
±5.55
LSB
TEMPERATURE DRIFT1
Offset Error
±2
±2
±3
ppm/°C
Gain Error
±12
±12
±12
ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1 V Mode)
±5
±35
±5
±35
±5
±35
mV
Load Regulation @ 1.0 mA
0.8
0.8
0.8
mV
Output Voltage Error (0.5 V Mode)
±2.5
±2.5
±2.5
mV
Load Regulation @ 0.5 mA
0.1
0.1
0.1
mV
INPUT REFERRED NOISE
VREF = 0.5 V
2.28
2.28
2.28
LSB rms
VREF = 1.0 V
1.08
1.08
1.08
LSB rms
ANALOG INPUT
Input Span, VREF = 0.5 V
1
1
1
V p-p
Input Span, VREF = 1.0 V
2
2
2
V p-p
Input Capacitance3
7
7
7
pF
REFERENCE INPUT RESISTANCE
7
7
7
POWER SUPPLIES
Supply Voltages
AVDD
2.7
3.0
3.6
2.7
3.0
3.6
2.7
3.0
3.6
V
DRVDD
2.25
3.0
3.6
2.25
3.0
3.6
2.25
3.0
3.6
V
Supply Current
IAVDD2
30
55
100
mA
IDRVDD2
2
5
7
mA
PSRR
±0.01
±0.01
±0.01
% FSR
POWER CONSUMPTION
DC Input4
90
165
300
mW
Sine Wave Input2
95
120
180
220
320
375
mW
Standby Power5
1.0
1.0
1.0
mW
1 Gain errors and gain temperature coefficients are based on the ADC only (with a fixed 1.0 V external reference).
2 Measured at maximum clock rate, low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
3 Input capacitance refers to the effective capacitance between one differential input pin and AGND.
4 Measured with dc input at maximum clock rate.
5 Standby power is measured with a dc input, the CLK pin inactive (that is, set to AVDD or AGND).


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