6

HV2701

Logic Function Table

Notes:

1.

The 16 switches operate independently.

2.

Serial data is clocked in on the L to H transition of the CLK.

3.

All 16 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the shift registers data flow through the latch.

4.

D

5.

Shift registers clocking has no effect on the switch states if LE is high.

6.

The CL clear input overrides all other inputs.

Logic Timing Waveforms

DATA

IN

LE

CLOCK

DATA

OUT

OFF

ON

OUT

(TYP )

V

50%

50%

50%

50%

t

SD

t

SU

t

h

50%

50%

50%

CLR

D

N+ 1

D

N

D

N- 1

50%

50%

90%

10%

D0

D1

...

D7

D8

...

D15

LE

CL

SW0

SW1

...

SW7

SW8

...

SW15

L-

...

--

...

-

L

L

OFF

-

...

--

...

-

H

-

--

-

L

L

ON

-

--

-

-L

-

-

-L

L

-

OFF

-

-

-

-

H

--

-

L

L

-

ON

--

-

--

--

-

L

L

-

-

-

-

-

--

--

-

L

L

-

-

-

-

-

-

-

L-

-

L

L-

-

OFF

-

-

--

H

-

-

L

L

-

-

ON

-

-

-

-

-L

-L

L

-

-

-

OFF

-

--

-

H

-

L

L

-

-

-

ON

-

--

--

-

L

L

-

-

-

-

-

--

--

-

L

L

-

-

-

-

-

--

--

-

L

L

-

-

-

-

-

--

--

-

L

L

-

-

-

-

-

--

--

L

L

L

--

--

OFF

--

--

H

L

L

-

-

-

-

ON

X

X

X

X

X

X

X

H

L

HOLD PREVIOUS STATE

X

X

X

X

X

X

X

X

H

ALL SWITCHES OFF