Electronic Components Datasheet Search |
|
HV6506X Datasheet(PDF) 1 Page - Supertex, Inc |
|
HV6506X Datasheet(HTML) 1 Page - Supertex, Inc |
1 / 5 page 12-132 Device Features ■ Processed with HVCMOS® technology ■ 32 push-pull CMOS output up to 60V ■ Low power level shifting ■ Source/sink current minimum 5mA ■ Shift register speed 5MHz ■ Latched data outputs ■ Bidirectional shift register (DIR) ■ Backplane output 32-Channel LCD Driver with Separate Backplane Output HV6506 Absolute Maximum Ratings1 Supply voltage, V DD 2 -0.5V to +7.0V Output voltage, VPP 2 -0.5V to +80V Logic input levels2 -0.5V to V DD + 0.5V Ground current3 1.5A Continuous total power dissipation4 1200mW Operating temperature range -40°C to +85°C Storage temperature range -65°C to +125°C Lead temperature 1.6mm (1/16 inch) 260°C from case for 10 seconds Notes: 1. Device will survive (but operation may not be specified or guaranteed) at these extremes. 2. All voltages are referenced to VSS. 3. Duty cycle is limited by the total power dissipated in the package. 4. For operation above 25°C ambient derate linearly to 85°C at 20mW/°C. General Description The HV65 is a low-voltage serial to high-voltage parallel converter with push-pull outputs. This device has been designed for use as a driver circuit for LCD displays. It can also be used in any application requiring multiple output high-voltage current sourc- ing and sinking capabilities. The inputs are fully CMOS compat- ible. The device consists of a 32-bit shift register, 32 latches, and control logic to perform the polarity select of the outputs. HVout1 is connected to the first stage of the shift register through the polarity logic. Data is shifted through the shift register on the logic low to high transition of the clock. A DIR pin causes data shifting counterclockwise when grounded and clockwise when connected to V DD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable) or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored after LE transition from high to low. Ordering Information Package Options 44-J Lead Quad 44 Lead Quad Dice Plastic Chip Carrier Plastic Gullwing in waffle pack HV6506 HV6506PJ HV6506PG HV6506X |
Similar Part No. - HV6506X |
|
Similar Description - HV6506X |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |