7

HV9110

Reference

The Reference of the HV9110 consists of a stable bandgap

reference followed by a buffer amplifier which scales the

voltage up to approximately 4.0V. The scaling resistors of

the reference buffer amplifier are trimmed during manufac-

ture so that the output of the error amplifier, when connected

in a gain of –1 configuration, is as close to 4.0V as possible.

This nulls out any input offset of the error amplifier. As a con-

sequence, even though the observed reference voltage of a

specific part may not be exactly 4.0V, the feedback voltage

required for proper regulation will be.

A ≈ 50KΩ resistor is placed internally between the output of

the reference buffer amplifier and the circuitry it feeds (refer-

ence output pin and non-inverting input to the error ampli-

fier). This allows overriding the internal reference with a low

impedance voltage source ≤6.0V. Using an external refer-

ence reinstates the input offset voltage of the error amplifier,

and its effect of the exact value of feedback voltage required.

Because the reference of the HV9110 is a high impedance

node, and usually there will be significant electrical noise

near it, a bypass capacitor between the reference pin and

VSS is strongly recommended. The reference buffer ampli-

fier is intentionally compensated to be stable with a capaci-

tive load of 0.01 to 0.1µF.

Error Amplifier

The error amplifier in the HV9110 is a true low-power dif-

ferential input operational amplifier intended for around the

amplifier compensation. It is of mixed CMOS-bipolar con-

struction: A PMOS input stage is used so the common mode

range includes ground and the input impedance is very high.

This is followed by bipolar gain stages which provide high

gain without the electrical noise of all-MOS amplifiers. The

amplifier is unity gain stable.

Current Sense Comparators

The HV9110 uses a true dual comparator system with in-

dependent comparators for modulation and current limiting.

This allows the designer greater latitude in compensation

design, as there are no clamps (except ESD protection) on

the compensation pin. Like the error amplifier, the compara-

tors are of low-noise BiCMOS construction.

Remote Shutdown

The shutdown and reset pins of the 9110 can be used to

perform either latching or non-latching shutdown of a con-

verter as required. These pins have internal current source

pull-ups so they can be driven from open drain logic. When

not used they should be left open, or connected to VDD.

Output Buffer

The output buffer of the HV9110 is of standard CMOS con-

struction (P-channel pull-up, N-channel pull-down). Thus the

body-drain diodes of the output stage can be used for spike

clipping if necessary, and external Schottky diode clamping

of the output is not required.