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HT46R49E Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT46R49E Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
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4 / 73 page  HT46R48AE Pin Name I/O Configuration Option Description PA0~PA2 PA3/PFD PA4/TMR PA5/INT PA6~PA7 I/O Pull-high Wake-up PA3 or PFD Bidirectional 8-bit input/output port. Each individual pin on this port can be configured as a wake-up input by a configuration option. Software instruc- tions determine if the pin is a CMOS output or Schmitt Trigger input. Configu- ration options determine which pins on the port have pull-high resistors. Pins PA3, PA4 and PA5 are pin-shared with PFD, TMR and INT, respectively. PB0/AN0 PB1/AN1 PB2/AN2 PB3/AN3 PB4~PB7 I/O Pull-high Bidirectional 8-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration options determine which pins on the port have pull-high resistors. PB is pin-shared with the A/D input pins. The A/D inputs are selected via software instructions. Once se- lected as an A/D input, the I/O function and pull-high resistor options are dis- abled automatically. PC0/SDA PC1/SCL I/O Pull-high Bidirectional 2-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration options determine which pins on the port have pull-high resis- tors. Pins SDA and SCL of the EEPROM are internally connected to pins PC0 and PC1, respectively. PD0/PWM I/O Pull-high I/O or PWM Bidirectional 1-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration option determines if this pin has a pull-high resistor. The PWM output is pin-shared with pin PD0 selected via a configuration option. OSC1 OSC2 I O Crystal or RC OSC1, OSC2 are connected to an external RC network or external crystal, determined by configuration option, for the internal system clock. If the RC system clock option is selected, pin OSC2 can be used to measure the sys- tem clock at 1/4 frequency. RES I ¾ Schmitt Trigger reset input. Active low. VDD ¾¾ Positive power supply VSS ¾¾ Negative power supply, ground Note: 1. Each pin on PA can be programmed through a configuration option to have a wake-up function. 2. Individual pins can be selected to have a pull-high resistor. 3. Pins PB4~PB7 exist but are not bonded out on the 20-pin package. 4. Unbonded pins should be setup as outputs or as inputs with pull-high resistors to conserve power. HT46R49E Pin Name I/O Configuration Option Description PA0~PA2 PA3/PFD PA4/TMR PA5/INT PA6~PA7 I/O Pull-high Wake-up PA3 or PFD Bidirectional 8-bit input/output port. Each individual pin on this port can be configured as a wake-up input by a configuration option. Software instruc- tions determine if the pin is a CMOS output or Schmitt Trigger input. Configu- ration options determine which pins on the port have pull-high resistors. Pins PA3, PA4 and PA5 are pin-shared with PFD, TMR and INT, respectively. PB0/AN0 PB1/AN1 PB2/AN2 PB3/AN3 PB4~PB7 I/O Pull-high Bidirectional 8-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration options determine which pins on the port have pull-high resistors. PB is pin-shared with the A/D input pins. The A/D inputs are selected via software instructions. Once se- lected as an A/D input, the I/O function and pull-high resistor options are dis- abled automatically. PC0/SDA PC1/SCL PC2~PC4 I/O Pull-high Bidirectional 5-bit input/output port. Software instructions determine if the pin is a CMOS output or Schmitt Trigger input. Configuration options determine which pins on the port have pull-high resis- tors. Pins SDA and SCL of the EEPROM are internally connected to pins PC0 and PC1, respectively. HT46R46E/C46E/R47E/C47E/R48AE/C48AE/R49E Rev. 1.20 4 August 15, 2007 |
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