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HT49RA0 Datasheet(PDF) 6 Page - Holtek Semiconductor Inc |
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HT49RA0 Datasheet(HTML) 6 Page - Holtek Semiconductor Inc |
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6 / 39 page  HT49RA0/HT49CA0 Rev. 1.20 6 October 24, 2007 When a control transfer takes place, an additional dummy cycle is required. Program Memory - ROM The program memory (ROM) is used to store the pro- gram instructions which are to be executed. It also con- tains data, table, and interrupt entries, and is organized into 2048 ´ 14 bits which are addressed by the program counter and table pointer. Certain locations in the ROM are reserved for special usage: · Location 000H Location 000H is reserved for program initialization. After chip reset, the program always begins execution at this location. · Location 004H Location 004H is reserved for the external interrupt service program. If the INT0 input pin is activated, and the interrupt is enabled, and the stack is not full, the program begins execution at location 004H. · Location 008H Location 008H is reserved for the external interrupt service program also. If the INT1 input pin is activated, and the interrupt is enabled, and the stack is not full, the program begins execution at location 008H. · Location 00CH Location 00CH is reserved for the Timer/Event Coun- ter interrupt service program. If a timer interrupt re- sults from a Timer/Event Counter overflow, and if the interrupt is enabled and the stack is not full, the pro- gram begins execution at location 00CH. · Location 010H Location 010H is reserved for the Time Base interrupt service program. If a Time Base interrupt occurs, and the interrupt is enabled, and the stack is not full, the program begins execution at location 010H. · Location 014H Location 014H is reserved for the real time clock inter- rupt service program. If a real time clock interrupt oc- curs, and the interrupt is enabled, and the stack is not full, the program begins execution at location 014H. · Table location Any location in the ROM can be used as a look-up ta- ble. The instructions ²TABRDC [m]² (the current page, 1 page=256 words) and ²TABRDL [m]² (the last page) transfer the contents of the lower-order byte to the specified data memory, and the contents of the higher-order byte to TBLH (Table Higher-order byte register) (08H). Only the destination of the lower-order byte in the table is well-defined; the other bits of the ta- ble word are all transferred to the lower portion of TBLH, and the remaining 2 bit is read as ²0². The TBLH is read only, and the table pointer (TBLP) is a read/write register (07H), indicating the table location. Before accessing the table, the location should be placed in TBLP. All the table related instructions re- quire 2 cycles to complete the operation. These areas may function as a normal ROM depending upon the user ¢s requirements. 0 0 0 H D e v i c e i n i t i a l i z a t i o n p r o g r a m E x t e r n a l i n t e r r u p t 0 s u b r o u t i n e T i m e r / e v e n t c o u n t e r 0 i n t e r r u p t s u b r o u t i n e P r o g r a m R O M 1 4 b i t s 0 1 4 H L o o k - u p t a b l e ( 2 5 6 w o r d s ) 7 F F H N o t e : n r a n g e s f r o m 0 t o 6 E x t e r n a l i n t e r r u p t 1 s u b r o u t i n e 0 0 C H T i m e B a s e I n t e r r u p t R T C I n t e r r u p t L o o k - u p t a b l e ( 2 5 6 w o r d s ) 1 0 0 H 1 F F H 0 1 0 H 7 0 0 H 0 0 8 H 0 0 4 H n F F H Program Memory Instruction(s) Table Location *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: *10~*0: Table location bits P10~P8: Current program Counter bits @7~@0: Table pointer bits |
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