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SC471AMLTRT Datasheet(PDF) 10 Page - Semtech Corporation |
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SC471AMLTRT Datasheet(HTML) 10 Page - Semtech Corporation |
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10 / 27 page  10 © 2006 Semtech Corp. SC471/SC471A www.semtech.com POWER MANAGEMENT Zero Cross detector, then both DH and DL will remain low until FB drops to the 0.75V reference, at which point the next DH on-time will begin. This is normal operation at light load. The typical operating frequency is 325kHz. It is possible to raise the frequency by placing a resistor divider between the output and the VOUT pin, see Figure 2. This reduces the voltage at the VOUT pin which is used to generate the on-time according to the previous equation. Note that this places a small minimum load on the output. The new frequency is approximated by the following equation: FREQ (kHz) = 325 ∙ (1 + R1/R2) Figure 2 It is also possible to lower the frequency using a resistive divider to the 5V bias supply, see Figure 3. This raises the voltage at the VOUT pin which will increase the on- time. Note that this results in a small leakage path from the 5V supply to the output voltage. The resistor values should be large to prevent the output voltage from drifting up during shutdown conditions. Note: the feedback resistors act as a dummy load to limit how far the output can rise. The new operating frequency is approximated by the equation: FREQ (kHz) = 325 ∙ ((R1 + R2) / (R1 + R2 ∙ VCC/VOUT)) VOUT Voltage Selection Output voltage is regulated by comparing VOUT as seen through a resistor divider to the internal 0.75V reference, see Figure 1. With D0/D1 in the open state, the output voltage is its lowest value and is set by the equation: VOUT = 0.75 • (1 + R1/R2) L COUT ESR + VOUT VLX pin 10 (VOUT) R1 R2 1nF Power Output VCC Figure 3 Voltage Transition Control The SC471/A provides G0/G1 control inputs to allow for the selection of up to four output voltages. The output voltage is regulated by comparing the FB pin (connected to VOUT via an external resistor divider) to the internal 0.75V reference. The G0/G1 inputs control the gates of internal MOSFETS, and the sources are connected to D0/D1. Using G0/G1, the user controls whether D0/D1 are grounded or open, which then controls the resistor divider ratio for VOUT. The SC471 uses active high logic for the G0/G1 inputs: a high signal on G0/G1 will tie D0/D1 to ground. The SC471A uses active low logic for the G0/G1inputs: a low signal on G0/G1 will tie D0/D1 to ground. When either the G0 or G1 input changes state, this change quickly causes three actions: The corresponding control output (D0 or D1) also changes state. The power good PGD output is temporarily latched into its present state. This prevents chattering or false tripping while VOUT moves to the new level. 1. 2. Applications Information (continued) L COUT ESR + VOUT VLX pin 10 (VOUT) R2 R1 1nF Power Output |
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