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SN74ABTH18502APMR Datasheet(PDF) 11 Page - Texas Instruments |
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SN74ABTH18502APMR Datasheet(HTML) 11 Page - Texas Instruments |
11 / 42 page SN54ABTH18502A, SN54ABTH182502A, SN74ABTH18502A, SN74ABTH182502A SCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS SCBS164E – AUGUST 1993 – REVISED DECEMBER 1996 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 boundary-control register The boundary-control register (BCR) is three bits long. The BCR is used in the context of the boundary-run test (RUNT) instruction to implement additional test operations not included in the basic SCOPE instruction set. Such operations include PRPG, PSA, and binary count up (COUNT). Table 4 shows the test operations that are decoded by the BCR. During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is reset to the binary value 010, which selects the PSA test operation. The BCR order of scan is shown in Figure 3. Bit 0 (LSB) TDO TDI Bit 1 Bit 2 (MSB) Figure 3. Boundary-Control Register Order of Scan bypass register The bypass register is a 1-bit scan path that can be selected to shorten the length of the system scan path, reducing the number of bits per test pattern that must be applied to complete a test operation. During Capture-DR, the bypass register captures a logic 0. The bypass register order of scan is shown in Figure 4. Bit 0 TDO TDI Figure 4. Bypass Register Order of Scan |
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