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AD9863BCPZRL-501 Datasheet(PDF) 5 Page - Analog Devices

Part # AD9863BCPZRL-501
Description  Mixed-Signal Front-End (MxFE?? Baseband Transceiver for Broadband Applications
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9863BCPZRL-501 Datasheet(HTML) 5 Page - Analog Devices

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AD9863
Rev. A | Page 5 of 40
POWER SPECIFICATIONS
Analog and digital supplies = 3.3 V; FCLKIN1 = FCLKIN2 = 50 MHz; PLL 4× setting; normal timing mode.
Table 3.
Parameter
Temp
Test Level
Min
Typ
Max
Unit
POWER SUPPLY RANGE
Analog Supply Voltage (AVDD)
Full
IV
2.7
3.6
V
Digital Supply Voltage (DVDD)
Full
IV
2.7
3.6
V
Driver Supply Voltage (DRVDD)
Full
IV
2.7
3.6
V
ANALOG SUPPLY CURRENTS
Tx Path (20 mA Full-Scale Outputs)
Full
V
70
mA
Tx Path (2 mA Full-Scale Outputs)
Full
V
20
mA
Rx Path (50 MSPS)
Full
V
103
mA
Rx Path (50 MSPS, Low Power Mode)
Full
V
69
mA
Rx Path (20 MSPS, Low Power Mode)
Full
V
55
mA
Tx Path, Power-Down Mode
Full
V
2
mA
Rx Path, Power-Down Mode
Full
V
5
mA
PLL
Full
V
12
mA
DIGITAL SUPPLY CURRENTS
Tx Path, 1× Interpolation,
50 MSPS DAC Update for Both DACs,
Half-Duplex 24 Mode
Full
V
20
mA
Tx Path, 2× Interpolation,
100 MSPS DAC Update for Both DACs,
Half-Duplex 24 Mode
Full
V
50
mA
Tx Path, 4× Interpolation,
200 MSPS DAC Update for Both DACs,
Half-Duplex 24 Mode
Full
V
80
mA
Rx Path Digital, Half-Duplex 24 Mode
Full
V
15
mA
DIGITAL SPECIFICATIONS
Table 4.
Parameter
Temp
Test Level
Min
Typ
Max
Unit
LOGIC LEVELS
Input Logic High Voltage, VIH
Full
IV
DRVDD
− 0.7
V
Input Logic Low Voltage, VIL
Full
IV
0.4
V
Output Logic High Voltage, VOH (1 mA Load)
Full
IV
DRVDD
− 0.6
V
Output Logic Low Voltage, VOL (1 mA Load)
Full
IV
0.4
V
DIGITAL PIN
Input Leakage Current
Full
IV
12
µA
Input Capacitance
Full
IV
3
pF
Minimum RESET Low Pulse Width
Full
IV
5
Input clock cycles
Digital Output Rise/Fall Time
Full
IV
2.8
4
ns


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