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AKD4346 Datasheet(PDF) 3 Page - Asahi Kasei Microsystems |
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AKD4346 Datasheet(HTML) 3 Page - Asahi Kasei Microsystems |
3 / 31 page ASAHI KASEI [AK4346] MS0531-E-00 2006/07 - 3 - PIN/FUNCTION No. Pin Name I/O Function 1 MCLK I Master Clock Input An external TTL clock should be input on this pin. 2 BICK I Audio Serial Data Clock 3 SDTI1 I DAC1 Audio Serial Data Input 4 LRCK I L/R Clock 5 RSTB I Reset Mode When at “L”, the AK4346 is in reset mode. The AK4346 must be reset once upon power-up. SMUTE I Soft Mute in parallel control mode “H”: Enable, “L”: Disable CSN I Chip Select in serial 3-wire mode 6 CAD0 I Chip Address in serial I2C mode ACKS I Auto Setting Mode in parallel control mode “L”: Manual Setting Mode, “H”: Auto Setting Mode CCLK I Control Data Clock in serial 3-wire control mode 7 SCL Control Data Clock in serial I2C control mode DIF0 I Audio Data Interface Format in parallel control mode CDTI I Control Data Input in serial 3-wire control mode 8 SDA I/O Control Data in serial I2C control mode 9 SDTI2 I DAC2 Audio Serial Data Input 10 SDTI3 I DAC3 Audio Serial Data Input 11 TST1 I Test pin – connect to ground. 12 DIF1 I Audio Data Interface Format CAD1 I Chip Address in serial control mode 13 DEM0 I De-emphasis Filter Enable 14 DVDD Digital Power Supply, +2.7 ∼+3.6V 15 DVSS Digital Ground I2C I µP I/F Mode Select in serial control mode “L”: 3-wire Serial, “H”: I 2C Bus 16 DEM1 I De-emphasis Filter Enable in parallel control mode 17 TST2 - Test pin – leave this pin floating. 18 TST3 - Test pin – leave this pin floating. 19 ROUT3 O DAC3 Right Channel Analog Output 20 LOUT3 O DAC3 Left Channel Analog Output 21 ROUT2 O DAC2 Right Channel Analog Output 22 LOUT2 O DAC2 Left Channel Analog Output 23 P/S I Parallel/Serial Control Mode Select (Internal pull-up pin) “L”: Serial control mode, “H”: Parallel control mode 24 ROUT1 O DAC1 Right Channel Analog Output 25 LOUT1 O DAC1 Left Channel Analog Output 26 VCOM O Common Voltage, AVDD/2 Normally connected to AVSS with a 0.1 µF ceramic capacitor in parallel with a 10 µF electrolytic cap. 27 AVSS - Analog Ground 28 AVDD - Analog Power Supply, +2.7 ∼+3.6V TDM0 I TDM I/F Format Mode in parallel control mode (Internal pull-down pin) “L”: Normal mode, “H”: TDM 256 mode 29 DZF2 O Data Zero Input Detect in serial control mode 30 DZF1 O Data Zero Input Detect Note: All input pins except P/S and TDM0 pins should not be left floating. |
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