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AK4647VN Datasheet(PDF) 11 Page - Asahi Kasei Microsystems |
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AK4647VN Datasheet(HTML) 11 Page - Asahi Kasei Microsystems |
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11 / 72 page  ASAHI KASEI [AK4647] MS0566-E-00 2006/11 - 11 - DC CHARACTERISTICS (Ta=25 °C; AVDD, DVDD=2.6 ∼ 3.6V; HVDD=2.6 ∼ 5.25V) Parameter Symbol min typ Max Units High-Level Input Voltage VIH 70%DVDD - - V Low-Level Input Voltage VIL - - 30%DVDD V High-Level Output Voltage (Iout= −200μA) VOH DVDD −0.2 - - V Low-Level Output Voltage (Except SDA pin: Iout=200 μA) VOL - - 0.2 V (SDA pin: Iout=3mA) VOL - - 0.4 V Input Leakage Current Iin - - ±10 μA SWITCHING CHARACTERISTICS (Ta=25 °C; AVDD, DVDD=2.6 ∼ 3.6V; HVDD=2.6 ∼ 5.25V; C L=20pF; unless otherwise specified) Parameter Symbol min typ max Units PLL Master Mode (PLL Reference Clock = MCKI pin) MCKI Input Timing Frequency fCLK 11.2896 - 27 MHz Pulse Width Low tCLKL 0.4/fCLK - - ns Pulse Width High tCLKH 0.4/fCLK - - ns MCKO Output Timing Frequency fMCK 0.2352 - 12.288 MHz Duty Cycle Except 256fs at fs=32kHz, 29.4kHz dMCK 40 50 60 % 256fs at fs=32kHz, 29.4kHz dMCK - 33 - % LRCK Output Timing Frequency fs 7.35 - 48 kHz Duty Cycle Duty - 50 - % BICK Output Timing Period BCKO bit = “0” tBCK - 1/(32fs) - ns BCKO bit = “1” tBCK - 1/(64fs) - ns Duty Cycle dBCK - 50 - % PLL Slave Mode (PLL Reference Clock = MCKI pin) MCKI Input Timing Frequency fCLK 11.2896 - 27 MHz Pulse Width Low tCLKL 0.4/fCLK - - ns Pulse Width High tCLKH 0.4/fCLK - - ns MCKO Output Timing Frequency fMCK 0.2352 - 12.288 MHz Duty Cycle Except 256fs at fs=32kHz, 29.4kHz dMCK 40 50 60 % 256fs at fs=32kHz, 29.4kHz dMCK - 33 - % LRCK Input Timing Frequency fs 7.35 - 48 kHz Duty Duty 45 - 55 % BICK Input Timing Period tBCK 1/(64fs) - 1/(32fs) ns Pulse Width Low tBCKL 0.4 x tBCK - - ns Pulse Width High tBCKH 0.4 x tBCK - - ns |
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