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AK4683EQ Datasheet(PDF) 2 Page - Asahi Kasei Microsystems |
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AK4683EQ Datasheet(HTML) 2 Page - Asahi Kasei Microsystems |
2 / 84 page [AK4683] MS0427-E-02 2007/04 - 2 - DIR/DIT Part - AES3, IEC60958, S/PDIF, EIAJ CP1201 Compatible - Low jitter Analog PLL - PLL Lock Range : 32kHz to 192kHz - Clock Source: PLL or X'tal - 4-channel Receiver input - 1-channel Transmission output (Through output or DIT) - Auxiliary digital input - De-emphasis for 32kHz, 44.1kHz, 48kHz and 96kHz - Detection Functions • Non-PCM Bit Stream Detection • DTS-CD Bit Stream Detection • Sampling Frequency Detection (32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz) • Unlock & Parity Error Detection • Validity Flag Detection - Up to 24bit Audio Data Format - 40-bit Channel Status Buffer - Burst Preamble bit Pc and Pd Buffer for Non-PCM bit stream - Q-subcode Buffer for CD bit stream TTL Level Digital I/F External Master Clock Input: - 256fs, 384fs, 512fs (fs=32kHz ∼ 48kHz) - 128fs, 192fs, 256fs (fs=64kHz ∼ 96kHz) - 128fs (fs=120kHz ∼ 192kHz) Master Clock Output: 128fs/256fs/384fs/512fs 2 Audio Serial I/F (PORTA, PORTB) - Master/Slave mode - I/F format PORTA: Left/Right(20/24 bit) justified, I 2S, TDM PORTB: Left/Right(20/24 bit) justified, I 2S 4-wire Serial and I 2C Bus μP I/F for mode setting Operating Voltage: 4.5 to 5.5V Power Supply for output buffer: 2.7 to 5.5V 64pin LQFP Package (0.5mm pitch) |
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