AKD4528_05 datasheet(5/45 Pages) AKM

Part #	AKD4528

Description	24Bit A/D & D/A converter

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Manufacturer	AKM [Asahi Kasei Microsystems]

Direct Link	http://www.akm.com

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5 / 45 page

ASAHI KASEI

[AKD4528]

2005/11

- 5 -

Set-up SW1

[SW1]: Set-up AK4528. Upper is “ON”(“H”), Lower is “OFF”(“L”)

(For further details, refer to the datasheet.)

No.

Name

Default

OFF

ON

1

P/S

ON

Serial mode

Parallel mode (Default)

2

DEM1

OFF

3

DEM0

ON

Set up de-emphasis (Default: OFF)

(Refer to the datasheet.)

4

DFS

OFF

Normal speed (Default)

Double speed

5

DIF

ON

MSB justified

I

2S (Default)

6

CKS1

OFF

7

CKS0

OFF

Set up Master clock frequency in case of the parallel mode

(Default: 256fs) (Refer to the datasheet.)

Table 5. Set up SW1

Set up Registers and Device pins of AK4528

The register setting uses the control software. (For further details, refer to the datasheet.)

1. Set up Parallel/Serial mode control

When P/S= “H”, the AK4528 becomes to the parallel mode. DIF pin selects the audio interface format, and DFS, CKS1,

and CKS0 pins select the master clock frequency.

When P/S= “L”, the AK4528 becomes to the serial mode. The CKS1, CKS0 and DIF pins are changed to CDTI, CCLK

and CSN pins respectively. The DEM1, DEM0 and DFS are ORed between pins and register respectively, so those are

able to control by pins even in serial mode. When all the functions are controlled by register, DEM1, DEM0 and DFS pins

should be set to “L”.

2. Set up Master clock frequency

(a) In case of serial mode

CMODE

bit

CKS1

bit

CKS0

bit

MCLK

Normal Speed

(DFS bit = “0”)

MCLK

Double Speed

(DFS bit = “1”)

0

256fs

N/A

(Default)

0

1

512fs

256fs

0

1

0

1024fs

512fs

1

0

384fs

N/A

1

0

1

768fs

384fs

Table 6. Set up Master clock frequency in case of serial mode

(b) In case of parallel mode

CKS1

(SW1-6)

CKS0

(SW1-7)

MCLK

Normal Speed

(DFS pin = “L”)

MCLK

Double Speed

(DFS pin = “H”)

L

256fs

N/A

(Default)

L

H

512fs

256fs

H

L

384fs

N/A

H

1024fs

512fs

Table 7. Set up Master clock frequency in case of parallel mode

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