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SN65LV1023ADBR Datasheet(PDF) 2 Page - Texas Instruments |
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SN65LV1023ADBR Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 29 page  www.ti.com 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AGND RCLK_R/F REFCLK AVCC RI+ RI− PWRDN REN RCLK LOCK AVCC AGND AGND DGND ROUT0 ROUT1 ROUT2 ROUT3 ROUT4 DVCC DGND DVCC DGND ROUT5 ROUT6 ROUT7 ROUT8 ROUT9 DB Package SN65LV1224B Deserializer 1 2 3 4 5 6 7 8 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 AVCC RI+ RI− PWRDN REN RCLK LOCK AVCC ROUT3 ROUT4 DVCC DGND DVCC DGND ROUT5 ROUT6 RHB Package SN65LV1224B Deserializer (Top View) SYNC1 SYNC2 DEN A+ A− PLL 10 LVDS Timing / Control TCLK_R/F DIN Y+ Y− PLL Timing / Control Clock Recovery 10 DOUT REN REFCLK LOCK RCLK_R/F RCLK (10 MHz to 66 MHz) TCLK (10 MHz to 66 MHz) SN65LV1224B SN65LV1023A SN65LV1023A SN65LV1224B SLLS621C – SEPTEMBER 2004 – REVISED FEBRUARY 2006 BLOCK DIAGRAMS 2 Submit Documentation Feedback |
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