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TPS65101RGERG4 Datasheet(PDF) 6 Page - Texas Instruments |
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TPS65101RGERG4 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 32 page  www.ti.com TPS65100, TPS65101 TPS65105 SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006 DEVICE INFORMATION (continued) Terminal Functions TERMINAL I/O DESCRIPTION NO. NO. NAME (PWP) (RGE) VIN 4 7 I Input voltage pin of the device Enable pin of the device. This pin should be terminated and not be left floating. A logic EN 24 3 I high enables the device and a logic low shuts down the device. COMP 22 1 Compensation pin for the main boost converter. A small capacitor is connected to this pin. Positive input terminal of the VCOM buffer. When the VCOM buffer is not used, this VCOMIN 11 14 I terminal can be connected to GND to reduce the overall quiescent current of the IC. Enable pin of the linear regulator controller. This pin should be terminated and not be ENR 23 2 I left floating. Logic high enables the regulator and a logic low puts the regulator in shutdown. C1+ 16 19 Positive terminal of the charge pump flying capacitor C1- 17 20 Negative terminal of the charge pump flying capacitor DRV 18 21 O External charge pump driver FB2 21 24 I Feedback pin of negative charge pump REF 20 23 O Internal reference output typically 1.23 V FB4 2 5 I Feedback pin of the linear regulator controller. The linear regulator controller is set to a fixed output voltage of 3.3 V or 3 V depending on the version. BASE 3 6 O Base drive output for the external transistor GND 19 22 Ground PGND 7, 8 10, 11 Power ground VCOM 10 13 O VCOM buffer output FB3 12 15 I Feedback pin of positive charge pump OUT3 13 16 O Positive charge pump output Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If the flying capacitor is connected to this pin, the converter operates in a voltage tripler C2-/MODE 15 18 mode. If the charge pump needs to operate in a voltage doubler mode, the flying capacitor is removed and the C2-/MODE pin should be connected to GND. Positive terminal for the charge pump flying capacitor. If the device runs in voltage C2+ 14 17 doubler mode, this pin should be left open. Supply pin of the positive, negative charge pump, boost converter gate drive circuit, and VCOM buffer. This pin should be connected to the output of the main boost SUP 9 12 I converter and cannot be connected to any other voltage source. For performance reasons, it is not recommended for a bypass capacitor to be connected directly to this pin. FB1 1 4 I Feedback pin of the boost converter SW 5, 6 8, 9 I Switch pin of the boost converter PowerPAD™/ The PowerPad or exposed thermal die needs to be connected to the power ground Thermal Die pins (PGND) 6 Submit Documentation Feedback |
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