SN54LV393A, SN74LV393A

DUAL 4BIT BINARY COUNTERS

SCLS457D − FEBRUARY 2001 − REVISED APRIL 2005

2

POST OFFICE BOX 655303

description/ordering informaton (continued)

These devices comprise two independent 4-bit binary counters, each having a clear (CLR) and a clock (CLK)

input. These devices change state on the negative-going transition of the CLK pulse. N-bit binary counters can

be implemented with each package, providing the capability of divide by 256. The ’LV393A devices have parallel

outputs from each counter stage so that any submultiple of the input count frequency is available for system

timing signals.

outputs, preventing damaging current backflow through the devices when they are powered down.

FUNCTION TABLE

INPUTS

FUNCTION

CLK

CLR

FUNCTION

↑

L

No change

↓

L

Advance to next stage

X

H

All outputs L

logic diagram, each counter (positive logic)

R

T

QA

CLR

CLK

R

T

QB

R

T

QC

R

T

QD

Q

Q

Q

Q