Electronic Components Datasheet Search |
|
SN74LVC1G132DBVR Datasheet(PDF) 1 Page - Texas Instruments |
|
|
SN74LVC1G132DBVR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 15 page www.ti.com FEATURES Seemechanicaldrawingsfordimensions. DBVPACKAGE (TOP VIEW) 5 1 V CC A 2 B 3 4 GND Y DCKPACKAGE (TOP VIEW) 2 B 3 4 GND V CC 5 A Y 1 YEP OR YZP PACKAGE (BOTTOMVIEW) 2 B V CC 1 5 A GND 4 3 Y DESCRIPTION/ORDERING INFORMATION SN74LVC1G132 SINGLE 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS SCES546B – FEBRUARY 2004 – REVISED SEPTEMBER 2006 • Ioff Supports Partial-Power-Down Mode Operation • Available in Texas Instruments NanoStar™ and NanoFree™ Packages • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • Supports 5-V VCC Operation • ESD Protection Exceeds JESD 22 • Inputs Accept Voltages to 5.5 V – 2000-V Human-Body Model (A114-A) • Max tpd of 5.3 ns at 3.3 V – 200-V Machine Model (A115-A) • Low Power Consumption, 10- µA Max I CC – 1000-V Charged-Device Model (C101) • ±24-mA Output Drive at 3.3 V The SN74LVC1G132 contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V VCC operation and performs the Boolean function Y = A • B or Y = A + B in positive logic. Because of Schmitt action, this device has different input threshold levels for positive-going (VT+) and negative-going (VT–) signals. This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2) NanoStar™ – WCSP (DSBGA) SN74LVC1G132YEPR 0.23-mm Large Bump – YEP Reel of 3000 _ _ _D5_ NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP SN74LVC1G132YZPR (Pb-free) –40°C to 85°C Reel of 3000 SN74LVC1G132DBVR SOT (SOT-23) – DBV C3B_ Reel of 250 SN74LVC1G132DBVT Reel of 3000 SN74LVC1G132DCKR SOT (SC-70) – DCK D5_ Reel of 250 SN74LVC1G132DCKT (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. (2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar, NanoFree are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Similar Part No. - SN74LVC1G132DBVR |
|
Similar Description - SN74LVC1G132DBVR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |