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ST7PLITEUS5M3 Datasheet(PDF) 4 Page - STMicroelectronics |
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ST7PLITEUS5M3 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 108 page ST7LITEUSx 4/108 1 INTRODUCTION The ST7ULTRALITE is a member of the ST7 mi- crocontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. The ST7ULTRALITE features FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability. Under software control, the ST7ULTRALITE de- vice can be placed in WAIT, SLOW, or HALT mode, reducing power consumption when the ap- plication is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. For easy reference, all parametric data are located in section 12 on page 67. The devices feature an on-chip Debug Module (DM) to support in-circuit debugging (ICD). For a description of the DM registers, refer to the ST7 ICC Protocol Reference Manual. Figure 1. General block diagram 8-BIT CORE ALU PA3 / RESET PORT A 10-BIT ADC with WATCHDOG Internal Clock CONTROL RAM (128 Bytes) PA5:0 (6 bits) VSS VDD POWER SUPPLY 8-MHz RC OSC LITE TIMER MEMORY 12-BIT AUTO- RELOAD TIMER FLASH 1K Byte LVD AWU RC OSC External Clock 1 |
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