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Y1

3

2

5

8

1

A

B

GND

DCT PACKAGE

(TOP VIEW)

YEP OR YZP PACKAGE

(BOTTOM VIEW)

DCU PACKAGE

(TOP VIEW)

3

2

4

5

1

A

Y0

B

GND

B

GND

Y2

Y3

See mechanical drawings for dimensions.

2

5

3

4

8

Y3

Y1

Y2

Y3

Y0

Y2

4

6

7

6

7

8

6

1

7

A

Y1

Y0

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G139

2-TO-4 LINE DECODER

SCES602B – AUGUST 2004 – REVISED DECEMBER 2005

•

Available in the Texas Instruments

•

Latch-Up Performance Exceeds 100 mA Per

NanoStar™ and NanoFree™ Packages

JESD 78, Class II

•

Supports 5-V V

•

ESD Protection Exceeds JESD 22

•

Inputs Accept Voltages to 5.5 V

– 2000-V Human-Body Model (A114-A)

•

Max t

– 200-V Machine Model (A115-A)

•

Low Power Consumption, 10-

µA Max I

CC

– 1000-V Charged-Device Model (C101)

•

±24-mA Output Drive at 3.3 V

•

I

Operation

The SN74LVC1G139 2-line to 4-line decoder is designed to be used in high-performance memory-decoding or

data-routing applications requiring very short propagation delay times. In high-performance memory systems, this

decoder can be used to minimize the effects of system decoding. When used with high-speed memories utilizing

a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than

the typical access time of the memory. This means that the effective system delay introduced by the decoder is

negligible.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoStar™ – WCSP (DSBGA)

SN74LVC1G139YEPR

0.23-mm Large Bump – YEP

Reel of 3000

_ _ _C9_

NanoFree™ – WCSP (DSBGA)

SN74LVC1G139YZPR

0.23-mm Large Bump – YZP (Pb-free)

–40

°C to 85°C

Reel of 3000

SN74LVC1G139DCTR

SSOP – DCT

C39_ _ _

Reel of 250

SN74LVC1G139DCTT

Reel of 3000

SN74LVC1G139DCUR

VSSOP – DCU

C39_

Reel of 250

SN74LVC1G139DCUT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2004–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.