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TMS320F28335 Datasheet(PDF) 7 Page - Texas Instruments |
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TMS320F28335 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 166 page  TMS320F28335, TMS320F28334, TMS320F28332 Digital Signal Controllers (DSCs) SPRS439B – JUNE 2007 – REVISED OCTOBER 2007 List of Tables 2-1 Hardware Features ............................................................................................................... 13 2-2 Signal Descriptions ............................................................................................................... 23 3-1 Addresses of Flash Sectors in F28335 ......................................................................................... 37 3-2 Addresses of Flash Sectors in F28334 ......................................................................................... 37 3-3 Addresses of Flash Sectors in F28332 ......................................................................................... 37 3-4 Handling Security Code Locations .............................................................................................. 38 3-5 Wait-states ......................................................................................................................... 39 3-6 Boot Mode Selection .............................................................................................................. 42 3-7 Peripheral Frame 0 Registers .................................................................................................. 46 3-8 Peripheral Frame 1 Registers ................................................................................................... 47 3-9 Peripheral Frame 2 Registers ................................................................................................... 47 3-10 Peripheral Frame 3 Registers ................................................................................................... 47 3-11 Device Emulation Registers ..................................................................................................... 48 3-12 PIE Peripheral Interrupts ........................................................................................................ 51 3-13 PIE Configuration and Control Registers ...................................................................................... 52 3-14 External Interrupt Registers ...................................................................................................... 53 3-15 PLL, Clocking, Watchdog, and Low-Power Mode Registers ................................................................ 55 3-16 PLLCR Bit Descriptions .......................................................................................................... 57 3-17 CLKIN Divide Options ............................................................................................................ 57 3-18 Possible PLL Configuration Modes ............................................................................................. 57 3-19 Low-Power Modes ................................................................................................................ 59 4-1 CPU-Timers 0, 1, 2 Configuration and Control Registers ................................................................... 63 4-2 ePWM Control and Status Registers ........................................................................................... 65 4-3 eCAP Control and Status Registers ............................................................................................ 68 4-4 eQEP Control and Status Registers ............................................................................................ 70 4-5 ADC Registers ..................................................................................................................... 74 4-6 McBSP Register Summary ...................................................................................................... 78 4-7 3.3-V eCAN Transceivers ....................................................................................................... 80 4-8 CAN Register Map ............................................................................................................... 83 4-9 SCI-A Registers .................................................................................................................. 85 4-10 SCI-B Registers .................................................................................................................. 85 4-11 SCI-C Registers .................................................................................................................. 86 4-12 SPI-A Registers ................................................................................................................... 89 4-13 I2C-A Registers .................................................................................................................... 92 4-14 GPIO Registers ................................................................................................................... 94 4-15 GPIO-A Mux Peripheral Selection Matrix ..................................................................................... 95 4-16 GPIO-B Mux Peripheral Selection Matrix ..................................................................................... 96 4-17 GPIO-C Mux Peripheral Selection Matrix ..................................................................................... 97 4-18 XINTF Configuration and Control Register Mapping ........................................................................ 100 List of Tables 7 |
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