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PCA9633PW Datasheet(PDF) 8 Page - NXP Semiconductors |
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PCA9633PW Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 42 page  PCA9633_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 20 December 2006 8 of 42 NXP Semiconductors PCA9633 4-bit Fm+ I2C-bus LED driver 7. Functional description Refer to Figure 1 “Block diagram of PCA9633”. 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 128 possible programmable addresses using the 7 hardware address pins. Two of these addresses, Software Reset and LED All Call, cannot be used because their default power-up state is ON, leaving a maximum of 126 addresses. Using other reserved addresses, as well as any other subcall address, will reduce the total number of possible addresses even further. 7.1.1 Regular I2C-bus slave address The I2C-bus slave address of the PCA9633 is shown in Figure 8. To conserve power, no internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW (10-pin and 16-pin versions). Remark: For the 16-pin version, reserved I2C-bus addresses must be used with caution since they can interfere with: • ‘reserved for future use’ I2C-bus addresses (0000 011, 1111 1XX) • slave devices that use the 10-bit addressing scheme (1111 0XX) • slave devices that are designed to respond to the General Call address (0000 000) • High-speed mode (Hs-mode) master code (0000 1XX). The last bit of the address byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. 7.1.2 LED All Call I2C-bus address • Default power-up value (ALLCALLADR register): E0h or 1110 000 • Programmable through I2C-bus (volatile programming) • At power-up, LED All Call I2C-bus address is enabled. PCA9633 sends an ACK when E0h (R/W = 0) or E1h (R/W = 1) is sent by the master. See Section 7.3.8 “LED All Call I2C-bus address, ALLCALLADR” for more detail. a. 8-pin version b. 10-pin version c. 16-pin version Fig 8. Slave address R/W 002aab318 1 1 0 0 0 1 0 fixed slave address R/W 002aab295 1 1 0 0 0 A1 A0 fixed hardware selectable slave address R/W 002aab319 A6 A5 A4 A3 A2 A1 A0 hardware selectable slave address |
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