PCA9633_3

© NXP B.V. 2006. All rights reserved.

Product data sheet

Rev. 03 — 20 December 2006

11 of 42

NXP Semiconductors

PCA9633

When the Control register is written, the register entry point determined by D[3:0] is the

first register that will be addressed (read or write operation), and can be anywhere

between 0000 and 1100 (as defined in Table 7). When AI[2] = 1, the Auto-Increment flag

is set and the rollover value at which the point where the register increment stops and

goes to the next one is determined by AI[2:0]. See Table 6 for rollover values. For

example, if the Control register = 1110 1000 (E8h), then the register addressing sequence

will be (in hex):

08

→ … → 0C → 00 → … → 07 → 02 → … → 07 → 02 → … → 07 → 02 → … as long

as the master keeps sending or reading data.

7.3 Register definitions

[1]

Only D[3:0] = 0000 to 1100 are allowed and will be acknowledged. D[3:0] = 1101, 1110, or 1111 are reserved and will not be

acknowledged.

[2]

When writing to the Control register, bit 4 must be programmed with logic 0 for proper device operation.

Table 7.

Register summary[1][2]

Register number (hex)

D3

D2

D1

D0

Name

Type

Function

00h

0

0

0

0

MODE1

read/write

Mode register 1

01h

0

0

0

1

MODE2

read/write

Mode register 2

02h

0

0

1

0

PWM0

read/write

brightness control LED0

03h

0

0

1

1

PWM1

read/write

brightness control LED1

04h

0

1

0

0

PWM2

read/write

brightness control LED2

05h

0

1

0

1

PWM3

read/write

brightness control LED3

06h

0

1

1

0

GRPPWM

read/write

group duty cycle control

07h

0

1

1

1

GRPFREQ

read/write

group frequency

08h

1

0

0

0

LEDOUT

read/write

LED output state

09h

1

0

0

1

SUBADR1

read/write

0Ah

1

0

1

0

SUBADR2

read/write

0Bh

1

0

1

1

SUBADR3

read/write

0Ch

1

1

0

0

ALLCALLADR

read/write