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2SK3440 Datasheet(HTML) 2 Page - Toshiba Semiconductor

Part No. 2SK3440
Description  Silicon N Channel MOS Type Switching Regulator, DC-DC Converter Applications
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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2SK3440 Datasheet(HTML) 2 Page - Toshiba Semiconductor

   
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2SK3440
2006-11-17
2
Marking
Electrical Characteristics (Note 4) (Ta = 25°C)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Gate leakage current
IGSS
VGS = ±25 V, VDS = 0 V
±10
μA
Drain cut-off current
IDSS
VDS = 60 V, VGS = 0 V
100
μA
Drain-source breakdown voltage
V (BR) DSS
ID = 10 mA, VGS = 0 V
60
V
Gate threshold voltage
Vth
VDS = 10 V, ID = 1 mA
2.0
4.0
V
Drain-source ON resistance
RDS (ON)
VGS = 10 V, ID = 25 A
6.5
8
m
Ω
Forward transfer admittance
|Yfs|
VDS = 10 V, ID = 25 A
15
30
S
Input capacitance
Ciss
3700
pF
Reverse transfer capacitance
Crss
280
pF
Output capacitance
Coss
VDS = 10 V, VGS = 0 V, f = 1 MHz
1320
pF
Rise time
tr
12
Turn-on time
ton
30
Fall time
tf
12
Switching time
Turn-off time
toff
VIN:
Duty <= 1%, tw = 10 μs
50
ns
Total gate charge
(gate-source plus gate-drain)
Qg
55
nC
Gate-source charge
Qgs
35
nC
Gate-drain (“miller”) charge
Qgd
VDD ∼− 48 V, VGS = 10 V, ID = 50 A
20
nC
Note 4: Connect the S1 and S2 pins together, and ground them except during switchin time measurement.
Source-Drain Ratings and Characteristics (Note 5) (Ta = 25°C)
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Continuous drain reverse current
(Note 1, Note 5)
IDR1
50
A
Pulse drain reverse current
(Note 1, Note 5)
IDRP1
200
A
Continuous drain reverse current
(Note 1, Note 5)
IDR2
1
A
Pulse drain reverse current
(Note 1, Note 5)
IDRP2
4
A
Forward voltage (diode)
VDS2F
IDR = 50 A, VGS = 0 V
−1.5
V
Reverse recovery time
trr
70
ns
Reverse recovery charge
Qrr
IDR = 50 A, VGS = 0 V,
dIDR/dt = 100 A/μs
123
nC
Note 5: IDR1, IDRP1: Current flowing between the drain and the S2 pin. Ensure that the S1 pin is left open.
IDR2, IDRP2: Current flowing between the drain and the S1 pin. Ensure that the S2 pin is left open.
Unless otherwise specified, connect the S1 and S2 pins together, and ground them.
VDD ∼− 30 V
0 V
VGS
10 V
ID = 25 A
VOUT
K3440
Lot No.
A line indicates
lead (Pb)-free package or
lead (Pb)-free finish.
Part No. (or abbreviation code)


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